# What is verilog ###### tags: `Digital IC Design` [回到主頁面](https://hackmd.io/@derek8955/BkK2Nb5Jo/https%3A%2F%2Fhackmd.io%2FdpcBlBL8TlShpQ-wSi9Quw) Verilog 是個 Hardware Description Language(HDL), 用於描述硬體架構的"連線"情形。 建議可以先看過以下兩部影片 1. https://www.youtube.com/watch?v=NOpXV3rXWDU 2. https://www.youtube.com/watch?v=zxL86pWY_QY
×
Sign in
Email
Password
Forgot password
or
By clicking below, you agree to our
terms of service
.
Sign in via Facebook
Sign in via Twitter
Sign in via GitHub
Sign in via Dropbox
Sign in with Wallet
Wallet (
)
Connect another wallet
New to HackMD?
Sign up