# IR-drop Analysis
###### tags: `Digital IC Design`
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`Process Node : TSMC_90GUTM`

1. Setting Environment

- #> mkdir power_log
做 IR drop 分析時會產生很多檔案

- #> innovus
restore design
File name: DBS/final

- Post Simulation
產出波形檔

2. Static Power Analysis

- Power → Power Analysis → Setup
Click OK

- Power → Power Analysis → Run

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> Dominant Frequency: design frequency
> Scope: testbentch module name/instantiation module name

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|Terminal 顯示 power 數值|

3. Create Power Grid Library

- Power → Rail Analysis → Set PG Library Mode

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> Filler Cell Names: FILL1 FILL16 FILL2 FILL32 FILL4 FILL64 FILL8
> Extraction tech file: */SOCE/Firelce/icecaps.tch
> LEF Layermap: */SOCE/Firelce/lef.layermap.libgen
> Voltage: 該製成的 core VDD

- Power → Rail Analysis → Generate PG Library

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- Power → Rail Analysis → Set PG Library Mode

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- Power → Rail Analysis → Generate PG Library

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4. Rail Analysis

- Power → Rail Analysis → Setup Rail Analysis

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- Power → Rail Analysis → Run Rail Analysis

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click create → Net Name: VDD → Fetch → Save → CHIP_VDD.pp
click create → Net Name: VSS → Fetch → Save → CHIP_VSS.pp
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> Threshold: 5% of core VDD

5. Power IR-drop Result

- Power → Report → Power Rail Result

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勾選 Auto Aplly for Color Scale

Click DB Setup
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Click Result Browser