Just because a program has no compilation errors does not mean that it works correctly. In case of malfunction, the program must be debugged to find the problem. Symbolic debugging allows to execute the program in a controlled way, step by step, stopping its execution and visualizing the value of the variables as we go along the program flow. It is recommended to review the concepts of breakpoint, step-over, step-into and continue, in addition to the debugging procedures described in https://hackmd.io/@parraman/prog-lab-gfie-practica-0#Depurando-programas. Debug Configurations In order to be able to debug symbolically, it is necessary to define a debug configuration in eclipse. This is done through the Run -> Debug Configurations option. In the previous image you can see the DEBUG_P0 configuration created in the GDB Hardware Debugging section and that refers to the P0 project. Using the options above the configuration explorer on the left it is possible to manage new configurations or delete the ones that are no longer used. The main tab simply contains the name of the P0 project and the Debug/P0 binary to be debugged. If you want to debug another program, the corresponding configuration should be created by changing the name of the project.

tm_tc_handling.h #ifndef TM_TC_HANDLING_H #define TM_TC_HANDLING_H #include "riscv_types.h" #define IDLE 0 #define READING_CCSDS_HEADER 1 #define READING_PACKET_DF 2

Satellite instruments generate scientific data and other metadata onboard spacecraft. These data must be reliably and transparently transmitted to other computing systems in space or on Earth, which implies the need to encode and decode these data in a standardized and highly automated manner. The Consultative Committee for Space Data Systems (CCSDS) is an international organization composed of various space agencies to recommend and develop international standards for spacecraft data and information systems. CCSDS has developed international standards for the transmission of space-acquired data from source to users, resulting in easier cooperation and service delivery. Packet telemetry provides a mechanism for implementing common data structures and protocols. CCSDS/PUS Packet brief /** * \brief Structure type to the Packet Header field of a TM/TC packet. */ struct ccds_pus_tmtc_packet_header {

The following exercises are based on the topics covered in class. Multibit field clear and set The following figure describe the bits layout of a SPI ctrl register. imagen The LEN field is made up of bits 23-20. Assume you have pointer already initialized to the memory where register is mapped uint32_t *pREG = <register address>; and the following code:

The objective of this practice is that the student learns to design, implement and use a set of basic timing services. Schedulle This practice is planned to be carried out in 1 week. P3 project creation In order to create the P3-A project follow the same steps as for creating P2. CLINT Timer Handling Installing an CLINC timer handler

In this part of the practice 3 we will see how the system real time counter will allow us to provide services destined to the construction of a cyclic executive, that is, a programme that periodically repeats a sequence of task execution. Cyclic executives have a basic period, which controls the start of the execution of a specific sequence of tasks, and a hyper-period, which is the number of basic periods from which the complete sequence of execution of the tasks of the cyclic executive is repeated. The following figure shows an example of a cyclic executive, in which the periodic execution of 3 tasks is controlled, whose periods and execution times are determined in the attached table. The cyclic executive has a basic period of 2 seconds, while the hyperperiod is 6 basic periods. #include "riscv_types.h" #include "riscv_uart.h" #include "clinc.h" #include "dispatch.h"

epd_pus_mission.h #ifndef EPD_PUS_MISSION_H #define EPD_PUS_MISSION_H /** * \brief Assigned Application Process ID */ #define EPD_APID 0x32C

Ejemplo de ejecución de gen_traza 5 elementos, burbuja, estado inicial ascendente SOA@LE05U00:~/SOA/p02$ ./gen_traza BUB ASC 5 T5 L0 L1 C L2 C L3 C L4 C Ordenado ;-) 5 elementos, burbuja, estado inicial descendente SOA@LE05U00:~/SOA/p02$ ./gen_traza BUB DES 5 T5 L0 L1 C E0 E1 L2 C E1

TC header receive and parsing. Polling version Remember that a TC packet has the following structure. In this exercise we are going to parse only the first six bytes (Packet Header) Use cutecom to send a TC like header sequence, for example: 1B 2C C0 01 00 05 :::info :information_source: First of all try to understand the code and then execute it. ::: Version 0 - Just receive 6 bytes and print their values. Polling version

A continuación se describen los pasos a seguir para actualizar el simulador de la asignatura y solucionar el error que se produce en algunas instalaciones al intentar conectar cutecom. Cutecom: ATENCIÓN: esto solo debe hacerlo si al intentar conectar cutecom al dispositivo /dev/tnt3 sale un mensaje de error o no existe. Mire si la carpeta Downloads contiene el fichero tty0tty.zip. Sino descarguelo del siguente enlace: tty0tty-master.zip a la carpeta Downloads Abrir una ventana de comandos (Terminal) mediante el icono y ejecutar los siguientes comandos: cd Downloads unzip tty0tty-master.zip

Objective The purpose of the following practice is to implement a simple driver of an UART interface. UART interface is available in the configuration of the simulator that is being used in this laboratory. Specifically, it is the UART (Universal Asynchronous Receiver-Transmitter), which allows asynchronous serial communication with other devices, both in input and output modes. Schedule This practice is planned to be carried out in 1 week. P2-A project creation In order to create the P2-A project follow the same steps as for creating P1. UART Controller registers layout

Mapa de memoria Text section Data section BSS section Memory management and allocation Memory allocation schemes Ejercicio 3

Objetive The purpose of the following practice is to implement a simple driver of the GPIO controller. The selected interface is available in the configuration of the SPIKE simulator that is being used in this laboratory. In our case the GPIO controller is connected to a 32-bit I/O port. Some of those bits are connected to leds, pushbuttons and switches present on the hardare of the board being simulated. The implementation of a driver for such a device requires the knowledge of the controller behaviour at a certain level of detail. Each controller register set has a specific layout which must be analysed before to proceed the driver design. Schedule This practice has two execises and is planned to be carried out in 1 week.

El entorno de laboratorio está basado en una máquina virtual (VM) VMWare con una distribución Linux Ubuntu 22.04 (Jammy Jellyfish) que ya contiene todos las herramientas necesarias para la realización de las prácticas. Con todo ello podrán realizar las prácticas en sus propios equipos. Para su puesta en marcha es preciso: Instalar el software VMWare Workstation Player Descargar o copiar la máquina virtual Ejecutar la máquina virtual Instalación de VMWare Workstation Player Si ya tiene instalado VMWare Workstation Player pase directamente al siguiente apartado. En caso contrario descargue el software desde los siguientes enlaces y ejecute el instalador. Existen versiones para Windows y Linux. Si necesita un entorno Mac consulte con el profesor para ver que alternativas existen.

Objective In this practice, the student is expected to understand the hardware mechanisms that support interruptions, exceptions and system calls, so that they are able to define and use basic routines for their management. The use of these routines will allow the student to understand how other higher level services of embedded software systems can be defined (device drivers or system calls), and how to deal with the exceptional situations that can occur during their execution. Event handling mechanisms The event handling mechanisms (interrupts, exceptions and system calls) provided by the processors facilitate access to system resources in a protected manner, ensuring their integrity against misuse. On the one hand, by means of system call instructions (also known as executive calls or TRAPs) the user can request services that were configured during the system initialization stage. These services allow managing abstractions such as file systems, processes or access to communication ports. The interrupt mechanism, on the other hand, allows external devices to request the processor's attention, so that a routine is executed in response to its request. Thanks to this mechanism, it is possible to avoid the polling of the job status assigned to the devices.

Objetive The objective of this practice is to understand the operation of the development and test environment that will be used for the realization of the practices. This environment is installed in a virtual machine with a Linux Ubuntu 22.04 (Jammy Jellyfish) distribution, although this configuration can be transferred to other Linux distributions without changes. In order to set up the development environment, please follow this LINK. As is shown in the figure above, the configuration that is described corresponds to a cross-compilation environment where binaries are generated for a different system than the one used for writing and compiling the programs, in this case a RISC-V platform. Environment Overview The elements of the development and test environment can be seen in the figure above and are:

The objective of this practice is to use the SPI interface in a real system. For this purpose, an already coded eclipse project is provided for the students to study and understand. :::info :information_source: First of all download the project and import it to your eclipse environment as is described below. ::: Download and import P5 eclipse project Download de P5 project ZIP form the following link: Project P5

Una posible solución de los ejercicios de la prueba de evaluación Gestión de la UART Se dispone de un sistema conectado a otro ordenador externo mediante una UART que se comunican mediante el intercambio de TC/TM: El último campo de la cabecera (Packet Length) contiene la cantidad de octetos – 1 que faltan por recibir después de la cabecera. Por ejemplo, si la cabecera es 0x1B 0x2C 0xC0 0x01 0x00 0x05, el último campo vale 5, esto significa que faltan por recibir 6 octetos. Para la gestión de esta comunicación ya se dispone del siguiente programa principal que funciona mediante sondeo de la UART. Una vez recibido el TC invoca la función procesa_y_respondeTC() que no hay que codificar. Asuma que ya están incluidos todos los include necesarios. NO se contempla el tratamiento de errores. Se garatiza que no se recibe más TCs hasta haber procesado el anterior.

void delay( uint64_t ticks_to_wait ) { uint64_t target_ticks = get_ticks_from_reset() + ticks_to_wait; uint64_t current_ticks; do { current_ticks = get_ticks_from_reset(); } while ( current_ticks < target_ticks ); }

#include "riscv_types.h" #include "riscv_uart.h" #include "dispatch.h" #include "log.h" #define GAP_1_DECIMA 1000000 // tick 10 veces por segundo #define FEND 0xC0 // Valor del delimitador de una trama KISS