---
# System prepended metadata

title: Lab 7

---

# Lab 7
Name:Dhanush M
Roll No.:CS22B053

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## Question 1

### Step 1 - Convert the integer part to binary
0<sub>10</sub> = 0<sub>2</sub>

### Step 2 - Convert the fraction part to binary
0.1 x 2 = 0.2, integral part = 0
0.2 x 2 = 0.4, integral part = 0
0.4 x 2 = 0.8, integral part = 0
0.8 x 2 = 1.6, integral part = 1
0.6 x 2 = 1.2, integral part = 1
0.2 x 2 = 0.4, integral part = 0
0.4 x 2 = 0.8, integral part = 0
0.8 x 2 = 1.6, integral part = 1
0.6 x 2 = 1.2, integral part = 1
...

Combine all intergral parts to get binary: 
.1<sub>10</sub> = .000110011....<sub>2</sub>
### Step 3 - Combine the integer and fraction part

0.1<sub>10</sub>= 0.000110011....<sub>2</sub>
## Question 2

### Step 1 - Sign bit
Sign is positive so Sign bit is 0.

### Step 2 - Convert to binary
```c=
#include <iostream>
using namespace std;

int main()
{
    double frac=0.1;
    int i=0;
    int n=0;
    for(i=0;i<23;i++)
    {
        frac=frac*2;
        n=int(frac);
        cout<<n;
        frac=frac-n;
    }
    return 0;
}

```
0.1 <sub>10</sub>=0.000110011001100110011001100<sub>2</sub>
### Step 3 - Convert binary to scientific notation 
0.000110011001100110011001100<sub>2</sub>=(1.10011001100110011001100 x 2<sup>-4</sup>)<sub>2</sub>
### Step 4 - Exponent part
Exponent has a bias of 127 in IEEE754 format, so -4 is represented as -4 +127 = 123

123<sub>10</sub>=1111011 <sub>2</sub>
### Step 5 - Combining sign,exponent,mantisa part
0.1 <sub>10</sub>=0 1111011 10011001100110011001100 in IEEE754 binary format

## Question 3
### Step 1 - Sign bit
Sign is positive so Sign bit is 0.
### Step 2 - Convert to binary
```c=
#include <iostream>
using namespace std;

int main()
{
    double frac=0.2;
    int i=0;
    int n=0;
    for(i=0;i<23;i++)
    {
        frac=frac*2;
        n=int(frac);
        cout<<n;
        frac=frac-n;
    }
    return 0;
}
```
0.2 <sub>10</sub>=0.00110011001100110011001100<sub>2</sub>

### Step 3 - Convert binary to scientific notation 
0.00110011001100110011001100<sub>2</sub>=(1.10011001100110011001100 x 2<sup>-3</sup>)<sub>2</sub>
### Step 4 - Exponent part
Exponent has a bias of 127 in IEEE754 format, so -3 is represented as -3 +127 = 124
124<sub>10</sub>=1111100 <sub>2</sub>
### Step 5 - Combining sign,exponent,mantisa part
0.1 <sub>10</sub>=0 1111100 10011001100110011001100 in IEEE754 binary format
### Step 5 - Converting back
0 1111100 10011001100110011001100 =>
Sign bit 0 =>Positive
Exponent part 1111100 <sub>2</sub>=124 <sub>10</sub>
Actual exponent =124-127=-3

Actual value =(1.10011001100110011001100 x 2 <sup>-3</sup>)<sub>2</sub>
             =0.00110011001100110011001100<sub>2</sub>
=0.19999998807907104492<sub>10</sub>
## Question 4
Two registers should be used for each floating point numbers
One for decimal part and other for integer part
Decimal points should be appended with appropriate no of zeros(ie upto 3 decimal in the example)
While adding decimal point two reg should be added and stored in a new reg and a new temp should extract the int out of the decimal sum reg
The temp reg and regs containing integers should be added and stored in new register resulting in new floating point 
Ex:
x1=5,x2=391
x3=2,x4=012
x5=x2+x4
x6=x5/1000
x5=x5-x6*1000
x6=x6+x1+x3





## Question 5
```assembly
.data 
w1: .word 0x3E4CCCCD
w2: .word 0x3F333333
w3: .word 0x0
.text
la x1 w1
lw x2 0(x1)
la x3 w2
lw x4 0(x3)
li x5 0x80000000
and x6 x2 x5
addi x31 x0 31 
srl x6 x6 x31
li x5 0x7f800000
and x7 x2 x5
addi x31 x0 23 
srl x7 x7 x31
li x5 0x007fffff
and x8 x2 x5
li x31 0x800000
add x8 x8 x31
beq x6 x0 loop
addi x25 x0 -1
mul x8 x8 x25

loop:
    li x5 0x80000000
    and x9 x4 x5
    addi x31 x0 31 
    srl x9 x9 x31
    li x5 0x7f800000
    and x10 x4 x5
    addi x31 x0 23 
    srl x10 x10 x31
    li x5 0x007fffff
    and x11 x4 x5
    li x31 0x800000
    add x11 x11 x31
    beq x9 x0 loop1
    addi x25 x0 -1
    mul x11 x11 x25
    
loop1:
    sub x12 x7 x10
    blez x12 change
    srl x11 x11 x12
    add x29 x7 x0
    add x23 x29 x0
    j ans

change:
    addi x25 x0 -1
    mul x12 x12 x25
    srl x8 x8 x12
    add x29 x10 x0
    add x23 x29 x0
ans:
    add x13 x11 x8
    beq x13 x0 end
    beq x6 x9 ans1
    j ans2
ans1:
    
    li x14,  0x7FFFFF
    and x15 x13 x14
    slli x6 x6 31
    slli x29 x29 23
    or x28 x6 x29
    or x28 x28 x15
    la x26 w3
    sw x28 0(x26)
    j end
    
ans2:
    add x31 x13 x0
    addi x22 x0 31 
    srl x6 x31 x22
    li x28 1
loop2:
    li x31 0x800000 
    and x29 x13 x31
    srai x29 x29 23
    beq x29 x28 ans3
    srl x13 x13 x28
    j loop2
ans3:
    li x14 0xFFFFF
    and x15 x13 x14
    slli x6 x6 31
    slli x23 x23 23
    or x28 x6 x23
    or x28 x28 x15
    la x26 w3
    sw x28 0(x26)
    j end
end:
    add x31 x0 x0
    addi a7 10
    ecall
```

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