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# System prepended metadata

title: Meeting 27/07

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# Meeting 27/07

## Administrative stuff
 
* https://admin.kuleuven.be/icts/english-site/proxy
* [Vivado Archive for 2018.3](https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/vivado-design-tools/archive.html)
* ZCU102

## Rough timeline

1. Choice of coin/algorithm (Wednesday afternoon)
2. Study the algorithm + source code + reference implementation (1 week)
3. Verilog architecture & verification (4 weeks)
4. Final miner (1 week)
5. Comparison (GPU, CPU, FPGA) 
    1. Speed
    2. Energy efficiency


## Coin

* ASIC-resistance
* Not yet existing
* Reference code 
* Memory-hardness
    * [Example FPGA work](https://medium.com/@ScatteredSecrets/bcrypt-password-cracking-extremely-slow-not-if-you-are-using-hundreds-of-fpgas-7ae42e3272f6)
* Avoid dynamic algorithms (too hard)

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