Bus width is the number of bits that a [microprocessor](https://www.ampheo.com/c/microprocessors) can transfer simultaneously over a bus (data bus, address bus, or control bus). Think of it like the number of lanes on a highway — more lanes allow more cars (bits) to move in parallel. ![Motherboard-Short-Circuit-Repair-768x480](https://hackmd.io/_uploads/HJ5ea7w_gl.jpg) **1. Types of Bus Width** **(a) Data Bus Width** Number of bits the CPU can read/write to memory or I/O in one operation. Example: * 8-bit bus → moves 1 byte per transfer. * 32-bit bus → moves 4 bytes per transfer. **(b) Address Bus Width** * Number of bits used to address memory locations. * Determines maximum directly addressable memory: ![企业微信截图_20250811163006](https://hackmd.io/_uploads/HJfm9QD_ee.png) **(c) Control Bus Width** * Carries control signals (read/write, clock, interrupts). * Width varies depending on architecture. **2. How Bus Width Affects Performance** **(a) Data Throughput** Wider data bus = more data moved per clock cycle. Example: At 100 MHz: * 8-bit bus → 100 MB/s max theoretical transfer. * 32-bit bus → 400 MB/s max theoretical transfer. **(b) Memory Access** If the CPU needs 32-bit data but only has an 8-bit bus, it must perform 4 separate reads → slower execution. **( c) Instruction Size & Execution** On some architectures, instruction fetch width is tied to data bus width — wider buses allow fetching larger instructions or multiple instructions faster. **(d) Addressing Capability** * A larger address bus allows more RAM/ROM to be connected without bank switching. * E.g., a 16-bit [microcontroller](https://www.ampheo.com/c/microcontrollers) with an 8-bit data bus can still address 64 KB, but moves only 1 byte at a time. **3. Real-World Example** * [Intel](https://www.ampheo.com/manufacturer/intel) [8088](https://www.ampheo.com/search/8088) (used in original IBM PC): 16-bit internal registers, 8-bit external data bus → slower memory access than the 8086 (16-bit data bus). * ARM Cortex-M4 ([STM32F4](https://www.ampheo.com/search/STM32F4) series): 32-bit internal registers, 32-bit data bus → can fetch entire words in one cycle. **In short:** * Data bus width → affects how fast data moves. * Address bus width → affects how much memory can be accessed. * For performance, wider buses generally mean higher throughput, but clock speed, cache, and memory latency also play big roles.