Here’s a clear, vendor-agnostic checklist to get an [FPGA board](https://www.onzuu.com/category/embedded-complex-logic-fpga-cpld) talking to your PC for programming, plus quick recipes for Xilinx/AMD, Intel (Altera), Lattice, and Microchip. ![maxresdefault (30)](https://hackmd.io/_uploads/ByBjqU86xx.jpg) **The universal checklist** **1. Identify your board & cable** Onboard USB-JTAG (common on dev kits), or external cable: * Xilinx/[AMD](https://www.ampheo.com/manufacturer/amd): Digilent USB-JTAG or Platform Cable USB II (14-pin header). * [Intel/Altera](https://www.ampheo.com/manufacturer/altera-intel): USB-Blaster II (10-pin 2×5 header). * [Lattice](https://www.ampheo.com/manufacturer/lattice-semiconductor): FTDI-based/Lattice USB Cable (often 10-pin JTAG). * [Microchip](https://www.ampheo.com/manufacturer/microchip-technology): FlashPro5/6 (10-pin). **2. Install tools + drivers** * Xilinx: Vivado (or ISE for Spartan-6), includes cable drivers. * Intel: Quartus Prime + USB-Blaster driver. * Lattice: Diamond/Radiant Programmer + cable driver. * Microchip: Libero + FlashPro Express. **3. Power the board correctly** Many boards power from USB; others need an external supply. Set jumpers (USB vs EXT) as required. **4. Check boot-mode switches** Ensure JTAG programming enabled (e.g., Xilinx M[2:0], Intel MSEL, etc.). The wrong mode can block detection. **5. Plug in the cable** Match the keyed notch; don’t force the ribbon the wrong way. If there’s onboard USB-JTAG, just use the USB port. **6. Verify the PC sees the cable** Windows Device Manager / macOS System Report / lsusb on Linux. If not visible, (re)install drivers. **7. Open the vendor programmer** Detect chain, select device, and choose what to program: * Volatile (SRAM): loads now, lost on power cycle. * Non-volatile (flash): loads on every power-up. **File types (quick map)** ![企业微信截图_20251010175206](https://hackmd.io/_uploads/S1eDPUI6lx.png) **Quick recipes by ecosystem** **Xilinx / AMD ([Spartan-7](https://www.vemeko.com/fpga-spartan-7/), [Artix-7](https://www.vemeko.com/artix-7-fpga/), [Kintex-7](https://www.vemeko.com/kintex-7-fpgas/), UltraScale/+)** 1. Install Vivado (or Vivado Lab if you only need the programmer). 2. Connect Digilent USB-JTAG (onboard micro-USB) or Platform Cable to the 14-pin JTAG header; power the board. 3. In Vivado → Hardware Manager: Open Target → Auto Connect. You should see the FPGA (e.g., [xc7a35t](https://www.ampheo.com/search/xc7a35t)). 4. Program volatile: Program Device → pick .bit. 5. Program flash (persistent): Tools → Program Configuration Memory → choose flash type, supply .mcs/.bin, program, then power-cycle to test. 6. If not detected: install cable drivers (Vivado menu: Help → Install Cable Drivers), check boot-mode pins, and try a different USB port. **Intel / Altera ([Cyclone](https://www.vemeko.com/cyclone-fpga/)/Max/Arria/[Stratix](https://www.vemeko.com/stratix-fpgas/))** 1. Install Quartus Prime (+ Programmer). 2. Connect USB-Blaster II to the 10-pin JTAG header (or onboard). 3. Open Quartus Programmer → Hardware Setup → USB-Blaster. 4. Program volatile: Add File → .sof, check Program/Configure, then Start. 5. Program flash: File → Convert Programming Files → make .jic (or .pof) from .sof, then program that file to flash; power-cycle to verify. 6. If the cable isn’t listed, install the USB-Blaster driver; check MSEL/boot switches. **Lattice ([iCE40](https://www.vemeko.com/ice40-lp-hx-family/), [ECP5](https://www.vemeko.com/ecp5-family/), [MachXO2](https://www.vemeko.com/machxo2-family/)/3)** 1. Install Radiant/Diamond and Programmer. 2. Use onboard FTDI USB or Lattice USB Cable → 10-pin JTAG (or SPI for iCE). 3. Volatile: program .bit/.bin to FPGA SRAM. 4. Flash: iCE40 often uses SPI flash .bin; MachXO uses .jed (non-volatile). Select interface (JTAG/SPI) correctly and program; then power-cycle. **Microchip / Microsemi ([SmartFusion2](https://www.vemeko.com/smartfusion2-soc/), [IGLOO2](https://www.vemeko.com/igloo2-fpga-and-smartfusion2-soc/), [PolarFire](https://www.vemeko.com/polarfire-fpgas/))** 1. Install Libero SoC + FlashPro Express. 2. Connect FlashPro5/6 (or onboard). 3. Open FlashPro Express, load the exported job from your Libero project, connect the target, Program; verify & power-cycle. **Open-source (handy for many boards)** openFPGALoader (CLI) supports lots of cables/boards: ``` # Example: program a .bit to a Digilent board openFPGALoader -c digilent mydesign.bit # Program SPI flash (persists on power-cycle) openFPGALoader -c digilent --write-flash mydesign.bin ``` OpenOCD can also do JTAG for some FPGAs with proper cfg files. **Common pitfalls & fixes** * Board not detected: wrong boot mode, missing drivers, unpowered board, wrong header orientation, or an incompatible cable. * Program OK but doesn’t persist: you only loaded SRAM—also program the configuration flash. * JTAG chain errors: other devices ([CPLD](https://www.ampheo.com/c/cplds-complex-programmable-logic-devices)/[PMIC](https://www.onzuu.com/category/power-management-pmic)) in chain—check TCK/TMS routing, set correct IR lengths, or temporarily bypass. * Power issues: USB ports can brown out; use a powered hub or external supply. * Level mismatch: if you’re using an external JTAG probe, ensure it matches the board’s IO voltage (often 3.3 V). **Minimal “first-time bring-up” checklist** * Exact board name & [FPGA](https://www.ampheoelec.de/c/fpgas-field-programmable-gate-array) part identified * Correct cable chosen & drivers installed * Board powered; boot-mode set for JTAG * Programmer sees the device * Program SRAM with your test image * Program flash for power-up config (optional) * Power-cycle and confirm it boots your design