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The Islamic University of Gaza
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Computer Architecture Lab - 2023
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LAB (6) || Control Unit Design
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Eng: Amal I. Mahfouz , Eng: Hassan Ghazy
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objective
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1. How can the control unit be designed, theoretically.
2. How can an ALU control be designed.
3. How can add extra instructions to pre-designed modules.
4. Utilizing Logisim, implement the Control Unit and ALU Control .
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<p style="font-size:20px;color:#000066;font-weight: bold;">
Control Unit
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A control unit, or CU, is circuitry within a computer’s processor that directs operations. It instructs the memory, logic unit, and both output and input devices of the computer on how to respond to the program’s instructions.

The control unit fetches internal program instructions from the main memory to the processor instruction register, and it generates a control signal based on the contents of this register to supervise the execution of these instructions.


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Design of Control Unit
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As we see below, we need :
* ALU **32-bit**, Mux(**2x1**), Data memory, **32** register ***32** bit/register Register file, instruction memory, Sign extend, Adder and **32 bit** register (pc) individual to design the processor

we will design the control unit that support the following instructions:

1. R-FORMAT instructions
2. Load instruction (lw)
3. Store instruction (sw)
4. beq instruction
5. jump instruction (j)

> we will assume (opcode) for these instructions as below: ( these is the inputs for control unit)

the outputs of the control unit are:

* **branch** (set to **1** for **branch** instruction)
* **MemtoReg** (set to **1** for **load** instruction , **0** for **R-format**)
* **ALUSrc** (set **0** for **R-format** instructions and **beq** instruction , set **1** for **immediate** instructions )
* **RegDst** (set **1** for **R**-format , set **0** for **immediate** instructions)
* **MemRead** (set **1** for **load** instruction )
* **MemWrite** (set **1** for **store** instruction)
* **RegWrite** (set **1** for **write** to register)
* **ALUOp** use to encoded ALU operations.
* **jump** (set to 1 for j instruction)

As we see (ALUOp) using for determine the ALU operations, which can be encoded using by (2-bits)
> 

The following tables show the required values for the control signals as a function of the instruction op-codes:

Logical, we can create equation from truth table:
* RegDst = OP5' • OP4' • OP3' • OP2' • OP1' • OP0'
* ALUSrc = OP5 • OP4' • OP2' • OP1 • OP0
..
and so on for the others.
> Logisim
> (There is a slight error in the figure below)
> 

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ALU control
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Previously, we known ALU have 5 operations (and, or,add,sub,slt), in this lab we learn ALU will using for LW,SW, and beq instructions.
so, we need ALU control to determined the operation for ALU.
* Remember : ALUOP signals determine the ALU operations (by using n2 bit)
* Note: ALU have control ( 3 selection to determined the operations , ex: and, or, add ,sub ,slt)
* Note: as input for ALU control we need ALUOp signals , The funct field determines the ALU operations for the r-type operations.