計算機組織與結構 & RISCV 資源整理

--- tags: RISCV, 伴學松 --- # 計算機組織與結構 & RISCV 資源整理 https://riscv.org/ ## 介紹 * [我也…可以跟電腦娘說話嗎 - 趙晉杰](https://hackmd.io/@dZfCcN4hT8aUuDPv3B8CWQ/Bkus0I4R_) * [【RISC-V介紹】三分鐘帶你了解RISC-V](https://weikaiwei.com/riscv/riscv-1/) 10820李哲榮教授 * [第11A講 New CPU architecture RISC-V](https://www.youtube.com/watch?v=SKOizNBU8mQ) * [第11B講 New CPU architecture RISC-V](https://www.youtube.com/watch?v=lqFIz1sHIio) * [第11C講 New CPU architecture RISC-V](https://www.youtube.com/watch?v=pJ3NWGjqCNU) ## 手冊 * [ISA Specification Volume 1](https://github.com/riscv/riscv-isa-manual/releases/download/Ratified-IMAFDQC/riscv-spec-20191213.pdf) * [ISA Specification Volume 2](https://github.com/riscv/riscv-isa-manual/releases/download/Priv-v1.12/riscv-privileged-20211203.pdf) * [RISC-V 指令集手册（卷一）](https://fmrt.gitbooks.io/riscv-spec-v2-cn/content/index.html) * [RISC-V 中文手册](http://riscvbook.com/chinese/RISC-V-Reader-Chinese-v2p1.pdf) ## 教案&筆記 ### Git, Source tree * [Git官方基本操作電子書 Pro Git](https://git-scm.com/book/en/v2) * [從零開始學習 Git](https://ithelp.ithome.com.tw/users/20141010/ironman/4499) ### 數位邏輯 * [清大開放式課程-數位邏輯設計](https://ocw.nthu.edu.tw/ocw/index.php?page=course&cid=230) * [交大學開放式課程-數位邏輯設計](https://ocw.nctu.edu.tw/course_detail.php?bgid=8&gid=0&nid=174) * [吳德順-數位邏輯設計](https://youtube.com/playlist?list=PLXxs-fSMcpYdwkCsnTXAkpvI2afmUkQgI) * [高中數位邏輯_循序邏輯電路之設計及應用_PART A](https://www.youtube.com/watch?v=6QZSNSevSA4&list=PLI6pJZaOCtF2Qbr7ZGz0WR00K-EUKmLDY) * [高中數位邏輯_組合邏輯電路的設計與應用_PART A ](https://youtu.be/Dwza5xMWwbY) * [高職數位邏輯](https://www.youtube.com/watch?v=68Aw0TK7LTo&list=PL_W2qSMrF7utuRYZVmT2_xJpISPuq_siS) * [數位邏輯設計清大資工學系林永隆教授](https://youtube.com/playlist?list=PLfXQiaewslOv00szAvSeASqSfKamP-0v8) * [DC Time的自學筆記](https://hackmd.io/@DCtime/ryUzQ-45q) ### Verilog * [天璇 - Verilog入門教學](https://youtube.com/playlist?list=PLkH9pBMaZuHQ0_P26d8ctZSd9trPajCmI) * [IC Design Using Verilog](https://drive.google.com/file/d/1Nee5plVd5v015u8TxWdydYzJZbTtwy6d/view?usp=sharing) * [Verilog線上練習](https://hdlbits.01xz.net/wiki/Main_Page) * [verilog中文pdf](https://caslab.ee.ncku.edu.tw/dokuwiki/_media/course:ldl:106b:laboratory_5.pdf) * [Runoob簡中網站verilog教學](https://www.runoob.com/w3cnote/verilog-tutorial.html) ### 計算機組織＆結構 * [教科书《计算机体系结构基础》（胡伟武等，第三版）的开源版本](https://github.com/foxsen/archbase) * [计算机架构进阶 – 学习笔记集合](https://blog.tomzhao.me/?p=1081&lang=zh) * [交大開放式課程 - 計算機概論](https://ocw.nycu.edu.tw/course_detail.php?nid=658) * [黃婷婷老師計算機結構HackMD筆記](https://hackmd.io/@sysprog/cpu-arch-lecture?type=view) * [黃婷婷老師計算機結構Computer Architecture](https://ocw.nthu.edu.tw/ocw/index.php?page=course&cid=76&) * [計算機概論google免費圖書（詳解）](https://books.google.com.tw/books?id=iYO-odoU0uUC&pg=PA17&lpg=PA17&dq=%E6%8C%87%E4%BB%A4decode&source=bl&ots=dlhAhA1dI9&sig=ACfU3U1j01RIwbyOAf9fYWrMkFaMg5CO-g&hl=zh-TW&sa=X&ved=2ahUKEwic5oT3_Y75AhXNMd4KHYDtDocQ6AF6BAgNEAI#v=onepage&q=%E6%8C%87%E4%BB%A4decode&f=false) * [110年計算機概論(含網路概論)重點整理+試題演練](https://books.google.com.tw/books?id=x8j0DwAAQBAJ&pg=PA66&lpg=PA66&dq=%E6%8C%87%E4%BB%A4decode&source=bl&ots=ex6oKvF1Xu&sig=ACfU3U1YpbkeE7cLQRH2JHezwKThA7OD9g&hl=zh-TW&sa=X&ved=2ahUKEwic5oT3_Y75AhXNMd4KHYDtDocQ6AF6BAgREAI) ### CPU, RISC-V相關 * [RISC-V University Resources](https://riscv.org/exchange/?_sft_exchange_category=learning) * [RISC-V Learn Online](https://riscv.org/risc-v-learn-online/) * [芯片天地](https://ica123.com/archives/18958) * [RISC-V - Jim's Dev Blog](https://tclin914.github.io/categories/RISC-V/) * [自己动手写CPU - Prician](https://blog.csdn.net/weixin_52259822/category_11709979.html) * [猴子都寫得出來的 RISC-V CPU Emulator 系列](https://ithelp.ithome.com.tw/users/20140342/ironman/4591?page=1) * [YosysHQ Nerv](https://github.com/YosysHQ/nerv) * [Cisen 32bit_RISC-V](https://github.com/cisen/32bit_RISC-V) * [q77190858 Rv32iMulticycleCPU](https://github.com/q77190858/Rv32iMulticycleCPU) * [中文電子書: 從 RISC-V 處理器到 UNIX 作業系統](https://github.com/riscv2os/riscv2os/wiki/riscv) * [RISC-V Instruction Set Specifications](https://msyksphinz-self.github.io/riscv-isadoc/html/index.html) * [RISC-V Metadata](https://github.com/michaeljclark/riscv-meta) ## 模擬器 * [Ripes - A graphical processor simulator and assembly editor for the RISC-V ISA](https://github.com/mortbopet/Ripes) * [SPIKES - a RISC-V ISA Simulator](https://github.com/riscv-software-src/riscv-isa-sim) * [rv32emu](https://github.com/sysprog21/rv32emu)