--- tags: RISCV, 伴學松, 伴學松活動記錄 --- # 從0到有製作自己的CPU!! 第七周活動記錄 20220818 [TOC] # 直播紀錄連結 {%youtube SwTbELYmL2g %} ## 出席 - [x] KIM_WENG - [x] 名名 - [ ] chuan - [x] bill503084699 - [ ] 楓糖 - [x] 謝祥辰 - [x] 黑貓 - [x] sixkwnp - [ ] Bonki - [x] ouo314 - [x] Willwho - [x] GYLABA - [x] mikuthebest - [x] Penquuin - [x] 葉子 - [ ] painCake - [x] EZ4ENCE - [ ] 頂漿汗腺 - [x] 角角 - [ ] adam chen # 討論內容 1. branch跟jump指令實作(先 Jump ~~後 Branch~~) 2. 下週目標由第一組做 Jump # 本周作業 # 討論重點 1. s type(save/store) rs1 =b01 … rs2 =b10 value =b100 rs1[imm +: 8]= rs1[7:0] [name= penquuin] 2. jump -UJ TYPE IMM ,RD PC +=IMM RD =PC [name= penquuin] #### penquuin ``` code= //<@541602475640356875> 00200093 // 000000000010 00000 000 00001 0010011 -- put 2 in 00001 00208113 // 000000000010 00001 000 00010 0010011 -- add 00001(data = 2) and 2 -> store in 00010(data becomes 4) 00116463 // imm12 | imm 10:5 | | imm 4:1 | imm 11 | // 0 | 000000 | 00001 00010 110 | 0100 | 0 | 1100011 // if data at 00010 is bigger than data at 00001 then jump from here to 8 (2 commands after) // imm has been **left-shifted** by one, so putting 0100 at 4:1 actually // assigns imm with the value 8 instead of 4 00300193 // 000000000011 00000 000 00011 0010011 -- put 3 in 00011 00400193 // 000000000100 00000 000 00011 0010011 -- put 4 in 00011 // jump to here! //這是我測試B-Type的指令,等等可以用 ``` #### 黑貓的code ```verilog= localparam branch_beq = 3'b000; localparam branch_bne = 3'b001; localparam branch_blt = 3'b010; localparam branch_bge = 3'b011; localparam branch_bltu = 3'b110; localparam branch_bgeu = 3'b111; always @(*) begin case(op) begin branch_beq: branch_out = (rs1 == rs2) ? 1'b1 : 1'b0; branch_bne: branch_out = (rs1 != rs2) ? 1'b1 : 1'b0; branch_blt: branch_out = (rs1 < rs2) ? 1'b1 : 1'b0; branch_bge: branch_out = (rs1 > rs2) ? 1'b1 : 1'b0; branch_bltu: branch_out = (rs1 < $unsigned(rs2)) ? 1'b1 : 1'b0; branch_bgeu: branch_out = (rs1 > $unsigned(rs2)) ? 1'b1 : 1'b0; default: branch_out = 1'b0; end end ``` ```verilog= module branch( input[31:0]rs1, input[31:0]rs2, input[2:0] op, output reg branch_out ); alway@(*)begin case(op) 3'b000:begin if(rs1==rs2) branch_out=1'b1; else branch_out=1'b0; end// 3'b001:begin if(rs1!=rs2) branch_out=1'b1; else branch_out=1'b0; end// 3'b100:begin if(rs1<rs2) branch_out=1'b1; else branch_out=1'b0; end// 3'b110:begin if(rs1<-rs2) branch_out=1'b1; else branch_out=1'b0; end// 3'b101:begin if(rs1>=rs2) branch_out=1'b1; else branch_out=1'b0; end// 3'b111:begin if(rs1>=rs2) branch_out=1'b1; else branch_out=1'b0; end// default:branch_out=1'b0; endcase end endmodule ```  ## 網址 [why are risc-v](https://stackoverflow.com/questions/58414772/why-are-risc-v-s-b-and-u-j-instruction-types-encoded-in-this-way) [risc-v 解決, b type](https://ithelp.ithome.com.tw/articles/10268196) ## 點子 / 撇步 - i-type(immediate) 因為rs2取代成imm ,因此會先load在rs1地址 [name=第三組] - s-type(save/store) [name=第三組] - jump的imm較為複雜是因為最高的位元…看正負號…… [name=第三組] - rs1 如果 ujenable 為 on, 所以 rs1=pc [name=第三組] - 用vscode講解jump指令 [name=第三組] - jump enable為什麼沒有關掉instrution…要用posedge 關掉 [name=第三組] - 討論剩下 J,B type並將指令剩下第三組的部分兜起來 [name=kim] - live coding [name=第三組] - a u I pc 算法也差不多 [name=willwho] - w 關起來用disable [name=第三組] - imm有缺的地方要補起來 [name=第三組] - 如果bq rs1 = rs2 加上pc地址後的 [name=第三組] - 黑貓查原廠收藏 [name=黑貓,dctime] - 要接回 pc 怎麼辦 [name=黑貓] - 有module其實一次用很多次運算,一次輸入輸出 - 跟軟體很不一樣 - modipraser - 不能回到 register file [name=Willwho] ## 聊天室內容             
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