I2C === ###### tags: `ASIC` [TOC] # I2C Pin - Serial Data Line (SDA) - Serial Clock Line (SCL) ![](https://i.imgur.com/rLI7rlC.png) # I2C bit rate - 100 Kbit/s (Standard-mode) - 400 Kbit/s (Fast-mode) - 1 Mbit/s (Fast-mode Plus) - 3.4 Mbit/s (High-speed mode) - 5 Mbit/s (Ultra High-speed mode) # I2C Feature - START and STOP conditions - START(S) condition: SDA 10 transition , SCL=1 - STOP(P) condition: SDA 01 transition , SCL=1 ![](https://i.imgur.com/idwm3Np.png) - Data validity (data latch) - When SCL = 1, SDA = valid data - Data changes during low clocks ![](https://i.imgur.com/ank386e.png) ![](https://i.imgur.com/TW4YeWP.png) - Data transfer - Data bits are transferred after start condition - Most significant bit (MSB) first - Address format - 7-bit for slave ID and 1-bit for read(1)/write(0) bit - ACK(0) and NACK(1) ![](https://i.imgur.com/plERJhT.png) # I2C protocol - Master transmit ![](https://i.imgur.com/11aYs8Z.png) - Master receive ![](https://i.imgur.com/5N1PjwS.png) ![](https://i.imgur.com/lS4ba56.png) - Repeat Start ![](https://i.imgur.com/uVl1gSM.png) ![](https://i.imgur.com/PacYIaX.png) - High Speed mode - Master code - To identify different I2C masters on the same bus ![](https://i.imgur.com/0FkxNYU.png) # Waveform ![](https://i.imgur.com/11CXY2u.png) ![](https://i.imgur.com/tlg6sWI.png) ![](https://i.imgur.com/IHeQ5ta.png) Reference === [成大Wiki, I2C: Inter-Integrated Circuit](https://goo.gl/HyTZpT)