# the rtl.f file no end of line cause gen_rtl fail ## issue ![](https://hackmd.io/_uploads/HkDydpGRh.png) [commit link cause fail](https://github.com/bol-edu/fsic_fpga/commit/922229846ff3ff3a4566ed51479fbeb3e4053adb) ## fixed ![](https://hackmd.io/_uploads/rJEmO6M0n.png) [commit link](https://github.com/bol-edu/fsic_fpga/commit/7d910e08f32efdd25452d3e14132c9ecb47fae33) ## compare 3 version of rtl.f ![](https://hackmd.io/_uploads/rJKHjpf03.png) ## this issue is work-around by this [commit in fsic_fpga](https://github.com/bol-edu/fsic_fpga/commit/7d910e08f32efdd25452d3e14132c9ecb47fae33) - the axis_switch/rtl.f include only one line and no End-of-Line(hex = 0A) then cause the gen_rtl failed execution "while read -r line" [code link](https://github.com/bol-edu/fsic_asic/blob/3881c92c33d9c786b1b758b3169e4dcd563075d4/src/gen_rtl#L22) ``` while read -r line do ... done < $src_fl ``` - When read file without "End-of-Line" then "while read -r line" doesn't execution `do ... done`. it just escape then no copy file list in axis_switch/rtl.f. - the workaround is just add a End-of-Line(hex = 0A) in axis_switch/rtl.f. ## final patch solution by improve gen_rtl in this [commit in fsic_asic](https://github.com/bol-edu/fsic_asic/commit/4fe5e2003b0ec397a03e7d9efd03444ea090a03c) ``` while read -r line || [ -n "$line" ] do ... done < $src_fl ``` ### [ -n "$line" ] - reutrn true if the string is non-empty [ -n NONEMPTYSTRING ] - NONEMPTYSTRING has a length of more than zero. - This condition only accepts valid strings, so be sure to quote anything you give to it. ``` if [ -n "$userinput" ]; thenuserinput=parse($userinput) # Only parse if the user actually gave some input. fi ``` Note that you can also omit the "-n", as brackets with just a string in it behave the same. [reference conditions-in-bash-scripting-if-statements](https://www.pluralsight.com/resources/blog/cloud/conditions-in-bash-scripting-if-statements) ## diff the file - pass vs failed ``` (base) tonyho@ubuntu5:~/workspace/fsic/fsic_fpga/rtl/user/axis_switch/rtl$ diff rtl.f.fail rtl.f.pass 1c1 < ../rtl/sw_caravel.v \ No newline at end of file --- > ../rtl/sw_caravel.v ``` ## show hex by xxd command ``` (base) tonyho@ubuntu5:~/workspace/fsic/fsic_fpga/rtl/user/axis_switch/rtl$ xxd rtl.f.fail 00000000: 2e2e 2f72 746c 2f73 775f 6361 7261 7665 ../rtl/sw_carave 00000010: 6c2e 76 l.v (base) tonyho@ubuntu5:~/workspace/fsic/fsic_fpga/rtl/user/axis_switch/rtl$ xxd rtl.f.pass 00000000: 2e2e 2f72 746c 2f73 775f 6361 7261 7665 ../rtl/sw_carave 00000010: 6c2e 760a l.v. (base) tonyho@ubuntu5:~/workspace/fsic/fsic_fpga/rtl/user/axis_switch/rtl$ ``` # After patch get_rtl, compare the result when with/without EOL ## target file - copy rtl.f.EOL or rtl.f.no-EOL to rtl.f during test ``` (base) tonyho@ubuntu5:~/workspace/fsic/fsic_fpga/rtl/user/axis_switch/rtl$ xxd rtl.f.EOL 00000000: 7377 5f63 6172 6176 656c 2e76 0a sw_caravel.v. (base) tonyho@ubuntu5:~/workspace/fsic/fsic_fpga/rtl/user/axis_switch/rtl$ xxd rtl.f.no-EOL 00000000: 7377 5f63 6172 6176 656c 2e76 sw_caravel.v ``` ## run_xsim result different - for run_xsim.EOL.log, get a line by "while read -r line" then go to `do ... done` - for run_xsim.no-EOL.log, didn't get a line by "while read -r line", but the $line is not empty then go to `do ... done` ``` while read -r line || [ -n "$line" ] do ... done < $src_fl ``` ![](https://hackmd.io/_uploads/ry2tuviT2.png)