## issue caravel provide some sdc file for signoff
- I need to update it for create sdc file for synthesis.

## Question: sdc files for signoff in caravel?

- _6817_ should be created after synthsis

set_case_analysis 0 [get_pins {chip_core/housekeeping/_6817_/Q}]

[code link](https://github.com/efabless/caravel-lite/blob/main/signoff/caravel/caravel.sdc#L36C4-L36C68)

- set_case_analysis
[静态时序分析—无效信号（set_case_analysis）](https://blog.csdn.net/m0_61544122/article/details/125702083)

set_case_analysis常应用于多mode的设计，给一些pin/port设置常量0或1，来实现切换mode分析时序的作用。举例来说，设计中存在SCAN mode和FUNC mode，在FUNC mode下将SCAN enbale信号用set_case_analysis设置为0，在FUNC mode下就不会分析scan clock的时序。

## reference sdc file from caravel

- [caravel signoff sdc](https://github.com/efabless/caravel-lite/blob/main/signoff/caravel/caravel.sdc)

- [user_project_wrapper.sdc](https://github.com/efabless/caravel_user_project/blob/main/sdc/user_project_wrapper.sdc)

- [user_proj_example.sdc](https://github.com/efabless/caravel_user_project/blob/main/sdc/user_proj_example.sdc)

- [housekeeping/base.sdc](https://github.com/efabless/caravel/blob/main/openlane/housekeeping/base.sdc)

create_clock [get_ports {"wb_clk_i"} ] -name "wb_clk_i"  -period $::env(WB_CLK_PERIOD)
create_clock [get_ports {"mgmt_gpio_in[4]"} ] -name "sck"  -period $::env(SCK_CLK_PERIOD)

## GENERATED CLOCKS
# NOTE: change the clock pins whenever the synthesis receipe changes 
set wbbd_sck_pin [get_pins -of_objects wbbd_sck -filter lib_pin_name==Q]

create_generated_clock -name "wbbd_sck" -source [get_ports {"wb_clk_i"} ] -divide_by 2 $wbbd_sck_pin

# paths between wb_clk_i and sck shouldn't be timed
set_clock_groups -logically_exclusive -group wb_clk_i -group sck 

### trace code for wbbd_sck
- How to create_generated_clock for wbbd_sck which is controlled by state machine.
[trace code for wbbd_sck](https://hackmd.io/@TonyHo/BkN3g5J9p)

### Question in Mux

- `-add` for what?
- Specifies whether to add this clock to the existing clock or to overwrite. Use this option to capture the case where multiple generated clocks must be specified on the same source, because multiple clocks fan into the master pin. Ideally, one generated clock must be specified for each clock that fans into the master pin. If you specify this option, you must also use the \-name option.
- 使用MUX切換clock時，一定要加 `-add`
- 若沒有加 `-add` 則會 overwrite the clock setting，後面的create_generated_clock 會overwite 前面的

[reference : 深度解析create_generated_clock](https://zhuanlan.zhihu.com/p/37686483)

### set_clock_groups for mux?

set_clock_groups -logically_exclusive -group wb_clk_i -group sck 

- mux

assign csclk = (wbbd_busy) ? wbbd_sck : ((spi_is_active) ? mgmt_gpio_in[4] : 1'b0);

[code link](https://github.com/TonyHo722/caravel-lite/blob/fsic/verilog/rtl/housekeeping.v#L1037C5-L1037C88)

### set wbbd_sck_pin, why need it?
[get_pins -of_objects housekeeping/wbbd_sck -filter lib_pin_name==Q]

- housekeeping/wbbd_sck is a net not pin

dc_shell> get_pins housekeeping/wbbd_sck
Warning: Can't find object 'housekeeping/wbbd_sck' in design 'caravel_top'. (UID-95)

- get_nets ok

dc_shell> get_nets housekeeping/wbbd_sck
{housekeeping/wbbd_sck}

- get_pins -of_objects xxx to get the pin of the object

dc_shell> get_pins -of_objects housekeeping/wbbd_sck
{housekeeping/U5037/A1 housekeeping/U4735/B1 housekeeping/wbbd_sck_reg/Q}

- use -filer lib_pin_name==Q

dc_shell> get_pins -of_objects housekeeping/wbbd_sck -filter lib_pin_name==Q
{housekeeping/wbbd_sck_reg/Q}

### get_pins from housekeeping/csclk

- housekeeping/csclk is output from a MUX.

dc_shell> get_pins -of_objects housekeeping/csclk
{housekeeping/U5029/A housekeeping/U5030/A housekeeping/U4735/X}

dc_shell> get_pins -of_objects housekeeping/csclk -filter lib_pin_name==X
{housekeeping/U4735/X}
dc_shell>

## List sdc files in caravel

(base) tonyho@ubuntu5:/ADATA2T/debug/la_test1_0105_repro_caravel_lite0_pass/caravel_user_project$ find . -name '*.sdc'
./mgmt_core_wrapper/signoff/mgmt_core_wrapper/openlane-signoff/mgmt_core_wrapper.sdc
./mgmt_core_wrapper/signoff/mgmt_core_wrapper/mgmt_core_wrapper.sdc
./mgmt_core_wrapper/signoff/RAM256/openlane-signoff/RAM256.sdc
./mgmt_core_wrapper/signoff/RAM256/RAM256.sdc
./mgmt_core_wrapper/signoff/RAM128/openlane-signoff/RAM128.sdc
./mgmt_core_wrapper/signoff/RAM128/RAM128.sdc
./mgmt_core_wrapper/openlane/mgmt_core_wrapper/base.sdc
./mgmt_core_wrapper/openlane/RAM256/base.sdc
./mgmt_core_wrapper/openlane/RAM128/base.sdc
./sdc/user_proj_example.sdc
./sdc/user_project_wrapper.sdc
./dependencies/openlane_src/scripts/base.sdc
./dependencies/openlane_src/designs/manual_macro_placement_test/base.sdc
./dependencies/openlane_src/designs/spm/src/spm.sdc
./dependencies/openlane_src/designs/xtea/src/xtea.sdc
./caravel/signoff/buff_flash_clkrst/openlane-signoff/buff_flash_clkrst.sdc
./caravel/signoff/gpio_logic_high/openlane-signoff/gpio_logic_high.sdc
./caravel/signoff/gpio_defaults_block/openlane-signoff/gpio_defaults_block.sdc
./caravel/signoff/mprj_logic_high/openlane-signoff/mprj_logic_high.sdc
./caravel/signoff/spare_logic_block/openlane-signoff/spare_logic_block.sdc
./caravel/signoff/constant_block/constant_block.sdc
./caravel/signoff/constant_block/openlane-signoff/constant_block.sdc
./caravel/signoff/caravan/caravan.sdc
./caravel/signoff/caravan/openlane-signoff/caravan.sdc
./caravel/signoff/gpio_defaults_block_0403/openlane-signoff/gpio_defaults_block_0403.sdc
./caravel/signoff/housekeeping/openlane-signoff/housekeeping.sdc
./caravel/signoff/housekeeping/housekeeping.sdc
./caravel/signoff/mgmt_protect_hv/openlane-signoff/mgmt_protect_hv.sdc
./caravel/signoff/gpio_defaults_block_1803/openlane-signoff/gpio_defaults_block_1803.sdc
./caravel/signoff/gpio_control_block/gpio_control_block.sdc
./caravel/signoff/gpio_control_block/openlane-signoff/gpio_control_block.sdc
./caravel/signoff/caravel_clocking/caravel_clocking.sdc
./caravel/signoff/caravel_clocking/openlane-signoff/caravel_clocking.sdc
./caravel/signoff/mprj2_logic_high/openlane-signoff/mprj2_logic_high.sdc
./caravel/signoff/mgmt_protect/openlane-signoff/mgmt_protect.sdc
./caravel/signoff/mgmt_protect/mgmt_protect.sdc
./caravel/signoff/simple_por/openlane-signoff/simple_por.sdc
./caravel/signoff/chip_io/openlane-signoff/chip_io.sdc
./caravel/signoff/digital_pll/openlane-signoff/digital_pll.sdc
./caravel/signoff/digital_pll/digital_pll.sdc
./caravel/signoff/xres_buf/openlane-signoff/xres_buf.sdc
./caravel/signoff/caravel/openlane-signoff/caravel.sdc
./caravel/signoff/caravel/caravel.sdc
./caravel/openlane/housekeeping/base.sdc
./caravel/openlane/gpio_control_block/base.sdc
./caravel/openlane/caravel_clocking/base2.sdc
./caravel/openlane/caravel_clocking/base.sdc
./caravel/openlane/mgmt_protect/base.sdc
./caravel/openlane/mgmt_protect/rcx.sdc
./caravel/openlane/digital_pll/base.sdc
./openlane/user_proj_example/runs/24_01_05_20_24/results/final/sdc/user_proj_example.sdc
./openlane/user_proj_example/runs/24_01_05_20_24/results/cts/user_proj_example.sdc
./openlane/user_proj_example/runs/24_01_05_20_24/tmp/12-user_proj_example.sdc
./openlane/user_proj_example/runs/24_01_05_20_24/tmp/placement/8-resizer.sdc
./openlane/user_proj_example/runs/24_01_05_20_24/tmp/cts/11-user_proj_example.resized.sdc
./openlane/user_proj_example/runs/24_01_05_20_24/tmp/synthesis/synthesis.sdc
./openlane/user_proj_example/runs/24_01_05_20_24/tmp/floorplan/3-initial_fp.sdc
./openlane/user_project_wrapper/runs/24_01_05_20_36/results/final/sdc/user_project_wrapper.sdc
./openlane/user_project_wrapper/runs/24_01_05_20_36/tmp/floorplan/3-initial_fp.sdc
./openlane/user_project_wrapper/runs/24_01_05_20_36/tmp/9-user_project_wrapper.sdc
(base) tonyho@ubuntu5:/ADATA2T/debug/la_test1_0105_repro_caravel_lite0_pass/caravel_user_project$