# Counter Module

Test case saat bertemu goal (reward=2800) sehingga episode mengalami inkremen dengan step kembali menjadi 0


Test case saat step mencapai batas (6) sehingga episode mengalami inkremen dengan step kembali menjadi 0

Namun program memiliki kelemahan yaitu:
* pada saat done_step rising edge step_done bertambah
* pengecekan selesainya satu episode hanya dari perubahan done_step (jika reward berubah dan done_step tidak berubah tidak akan selesai)
* ketika reward = 2800 step_done dan episode tidak akan bertambah meskipun rising edge done_step

## Episode Counter

`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date: 11/29/2021 11:47:50 PM
// Design Name: 
// Module Name: Episode_Counter
// Project Name: 
// Target Devices: 
// Tool Versions: 
// Description: 
// 
// Dependencies: 
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
//////////////////////////////////////////////////////////////////////////////////


module Episode_Counter#(parameter BIT_LGTH = 16, MAX_EPS = 30, MAX_STEP = 6, GOAL_RWD = 16'h2800)(   
    input [(BIT_LGTH-1):0] step_done,                         // Indicating step taken, from Step Counter
    input [(BIT_LGTH-1):0] rt,                                // Reward after action taken from Reward Module
    
    output done_learning,                                     // Learning has Converged
    output rst_step                                           // Maximum step reached or Goal is found
);

reg [(BIT_LGTH-1):0] episode=1;

always @(step_done)
begin
   if (episode == MAX_EPS)
        episode <= 1;
   else if (step_done == MAX_STEP || rt == GOAL_RWD)
        episode <= episode + 1;
   else
        episode <= episode;
end

assign done_learning = (episode == MAX_EPS) ? 1'b1: 0;
assign rst_step = (step_done >= MAX_STEP || rt == GOAL_RWD) ? 1'b1: 0;      
                                            
endmodule

## Step Counter

`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date: 11/30/2021 02:09:51 PM
// Design Name: 
// Module Name: Step_Counter
// Project Name: 
// Target Devices: 
// Tool Versions: 
// Description: 
// 
// Dependencies: 
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
//////////////////////////////////////////////////////////////////////////////////

module Step_Counter#(parameter BIT_LGTH = 16)(
    input en_counter,
    input rst_step,
    input done_step,
    
    output [(BIT_LGTH-1):0] step_done
);

reg [(BIT_LGTH-1):0] step = 0;

always @(posedge(done_step))
begin
   if (rst_step)
        step <= 0;
   else if (en_counter && done_step)
        step <= step + 1;
   else step <= step;
end
         
assign step_done = step;
                                  
endmodule

## Testbench

`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date: 01/26/2022 06:42:22 AM
// Design Name: 
// Module Name: counter_sim
// Project Name: 
// Target Devices: 
// Tool Versions: 
// Description: 
// 
// Dependencies: 
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
//////////////////////////////////////////////////////////////////////////////////


module counter_sim#(parameter BIT_LGTH = 16)();
reg [(BIT_LGTH-1):0] rt;
reg  en_counter;
reg  done_step = 1'b0;

wire rst_step;
wire done_learning;
wire [(BIT_LGTH-1):0] step_done;

 Step_Counter SC( .en_counter(en_counter),
                  .rst_step(rst_step),
                  .done_step(done_step),
                  .step_done(step_done));

 Episode_Counter EC(  .step_done(step_done),
                      .rt(rt),
                      .done_learning(done_learning),
                      .rst_step(rst_step));
 
integer i, j;  
initial 
    begin
        en_counter = 1'b1;
        #20;
        rt = {16'h2800};
            #20;
        for (i = 0; i < (28); i = i + 1)  begin
            for (j = 0; j < (3); j = j + 1)  begin
                rt = {16'h0000}; 
                #20;
                rt = {16'hEC00}; 
                #20; end
            rt = {16'h2800};
            #20;
            rt = {16'h0000};
            end
            
            rt = {16'h2800};
            #20;
            rt = {16'hEC00};
            #20;
            rt = {16'h2800};
            #20;
               
        en_counter = 1'b1;
        for (i = 0; i < (26); i = j + 1)  begin
            for (j = 0; j < (3); j = j + 1)  begin
                rt = {16'h0000}; 
                #20;
                rt = {16'hEC00}; 
                #20; end
            rt = {16'h2800};end       
    end

always
    begin
        done_step = ~done_step;
        #10;
    end    
endmodule