With the emergence of recursive proving and the convergence of finite fields to smaller sizes, Zero-Knowledge (ZK) proving is making significant strides in reducing latency, increasing throughput, and cutting costs. But why we would settle for less? By integrating highly efficient hardware acceleration, we can push these improvements even further. Ponos Technology once again showcases how our cutting-edge FPGA designs can take ZKP performance to unprecedented heights! Telos R&D team has successfully adapted Polygon Plonky2 to the BabyBear field for the recursive circuit, unlocking faster and more efficient zero-knowledge proofs (ZKPs) aggregation. Building on that foundation, Ponos Technology has introduced HW-accelerated Plonky2 GoldiBear, a groundbreaking solution that merges hardware acceleration with optimized software to deliver unprecedented performance in NTT and Poseidon2-based Merkle tree computations.[1] A Two-Pronged Innovation HW-Accelerated Plonky2 GoldiBear for the AMD Alveo U55C Ponos has custom-built a pipeline on the AMD Alveo U55C FPGA, targeting BabyBear field operations for high-throughput NTT/INTT and parallelized Poseidon2 hashing. These specialized circuits operate in tandem with on-chip buffering to minimize latency and cut down polynomial processing times to a fraction of the CPU baseline.