# Chapter2.
## Instructions: Language of the Computer

## MIPS Instruction Set
| Category | instruction | abbr. | Example | Meaning | Comment |
|:----------------------:|:-------------------------------- |:-----:|:------------------ |:-------------------------------- |:------------------------------------- |
| **Arithmetic** | add | add | add\$s1,\$s2,\$s3 | \$s1 = \$s2 + \$s3 | Three register operands |
| | subtract | sub | sub\$s1,\$s2,\$s3 | \$s1 = \$s2 - \$s3 | Three register operands |
| | add immediate | addi | addi\$s1,\$s2,20 | \$s1 = \$s2 + 20 | Used to add constants |
| **Data transfer** | load word | lw | lw\$s1,20(\$s2) | \$s1 = Memory[\$s2+20] | Word from memory to register |
| | store word | sw | sw\$s1,20(\$s2) | Memory[\$s2+20] = \$s1 | Word form register to memory |
| | load half | lh | lh\$s1,20(\$s2) | \$s1 = Memory[\$s2+20] | Halfword memory to register |
| | load half unsigned | lhu | lhu\$s1,20(\$s2) | \$s1 = Memory[\$s2+20] | Halfword memory to register |
| | store half | sh | sh\$s1,20(\$s2) | Memory[\$s2+20] = \$s1 | Halfword register to memory |
| | load byte | lb | lb\$s1,20(\$s2) | \$s1 = Memory[\$s2+20] | Bytes from memory to register |
| | load byte unsigned | lbu | lbu\$s1,20(\$s2) | \$s1 = Memory[\$s2+20] | Bytes from memory to register |
| | store byte | sb | sb\$s1,20(\$s2) | Memory[\$s2+20] = \$s1 | Bytes from register to memory |
| | load linked word | ll | ll\$s1,20(\$s2) | \$s1 = Memory[\$s2+20] | Load word as 1st half of atomic swap |
| | store condition word | sc | sc\$s1,20(\$s2) | Memory[\$s2+20] = \$s1:\$s1=0or1 | Store word as 2nd half of atomic swap |
| | load upper immed | lui | lui\$s1,20 | \$s1 = 20 * 2^16 | Loads constant in upper 16 bits |
| **Logical** | and | and | and\$s1,\$s2,\$s3 | \$s1 = \$s2 & \$s3 | Three reg. operands; bit-by-bit AND |
| | or | or | or\$s1,\$s2,\$s3 | \$s1 = \$s2 \| \$s3 | Three reg. operands; bit-by-bit OR |
| | nor | nor | nor\$s1,\$s2,\$s3 | \$s1 = ~(\$s2\|\$s3) | Three reg. operands; bit-by-bit NOR |
| | and immediate | andi | addi\$s1,\$s2,20 | \$s1 = \$s2 & 20 | Bit-by-bit AND reg with constant |
| | or immediate | ori | ori\$s1,\$s2,20 | \$s1 = \$s2 \| 20 | Bit-by-bit OR reg with constant |
| | shift left logical | sll | sll\$s1,\$s2,10 | \$s1 = \$s2 << 10 | Shift left by constant |
| | shift right logical | srl | srl\$s1,\$s2,10 | \$s1 = \$s2 >> 10 | Shift right by constant |
| **Conditional branch** | branch on equal | beq | beq\$s1,\$s2,25 | if(\$s1==\$s2) go to PC+4+100 | Equal test; PC-relative branch |
| | branch on not equal | bne | beq\$s1,\$s2,25 | if(\$s1!=\$s2) go to PC+4+100 | Not equal test; PC-relative |
| | set on less than | slt | slt\$s1,\$s2,\$s3 | if(\$s2<\$s3) \$s1=1;else \$s1=0 | Compare less than; for beq, bne |
| | set on less than unsigned | sltu | sltu\$s1,\$s2,\$s3 | if(\$s2<\$s3) \$s1=1;else \$s1=0 | Compare less than unsigned |
| | set less than immediate | slti | slti\$s1,\$s2,20 | if(\$s2<20) \$s1=1;else \$s1=0 | Compare less than constant |
| | set less than immediate unsigned | sltiu | sltiu\$s1,\$s2,20 | if(\$s2<20) \$s1=1;else \$s1=0 | Compare less than unsigned |
| **Unconditional jump** | jump | j | j2500 | go to 10000 | Jump to target address |
| | jump register | jr | jr$ra | go to $ra | For switch, procedure return |
| | jump and link | jal | jal2500 | $ra = PC+4:go to 10000 | FOr procedure call |

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## MIPS Register number

| Name | Register number | Usage | Preserved on call? |
|:-------- |:---------------:|:-------------------------------------------- |:------------------------------------:|
| \$zero | 0 | The constant value 0 | n.a. |
| \$v0-$v1 | 2-3 | Values for results and expression evaluation | no |
| \$a0-$a3 | 4-7 | Arguments | no |
| \$t0-$t7 | 8-15 | Temporaries | no |
| \$s0-$s7 | 16-23 | Saved | <font color="crimson">**yes**</font> |
| \$t8-$t9 | 24-25 | More temporaries | no |
| \$gp | 28 | Global pointer | <font color="crimson">**yes**</font> |
| \$sp | 29 | Stack pointer | <font color="crimson">**yes**</font> |
| \$fp | 30 | Frame pointer | <font color="crimson">**yes**</font> |
| \$ra | 31 | Return pointer | <font color="crimson">**yes**</font> |

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## MIPS R-format Instructions: (R-->Register)
| op | rs | rt | rd | shamt | funct |
|:-----:|:-----:|:-----:|:-----:|:-----:|:-----:|
| 6bits | 5bits | 5bits | 5bits | 5bits | 6bits |

Ex:Translate <font color="red">add $t0, $s1, $s2</font> to machine instruction
### Instruction field:
- op: operation code(opcode)
- rs: first source register number<font color="red">(\$s1)</font>
- rt: second source register number<font color="red">(\$s2)</font>
- rd: destination register number<font color="red">(\$t0)</font>
- shmat: shift amount(00000 for now) (ex:sll, srl)
- funct: function code(extend opcode)

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