# 1EDNx550 Supply And Input Considerations

## Overview

datasheet: https://www.infineon.com/dgdl/Infineon-1EDN7550B-DataSheet-v02_03-EN.pdf?fileId=5546d46262b31d2e01635d9799ef264f

* Ground Shifts are covered by the static common-mode voltage range.
* AC transients should be covered by dynamic tolerance to common-mode noise.
* Matching / precision of the series resistors is critical, 1% tol. degrades performance vs. 0.1%.
* MOSFET <!--ixft170n25x3hv--> avalanching beyond 250V could exceed dynamic common-mode range when 1EDN7550B is not floating.
* statis CMR is only +/- 40V with 1% resistors, -72/+84V with 0.1% resistors.
* With significant inductances, Fig.10 recommends connecting the GND reference to the MOSFET Source terminal.

The datasheet also states,

"Please be aware that a perfectly symmetric layout
of the input signal path is mandatory to reach the full CMR
ranges mentioned above. Any parasitic imbalance in the
signal path converts a common-mode signal into a
differential signal, resulting in reduced CMR performances."

### A Gate Driver With Differential Input


### Bipolar Gate Drive Scheme


### Common-Mode Range


## Conclusions
* higher PWM output voltage and higher resistance values significantly improve CMR over low voltage PWM.
* Symmetrical / differential control signals (+5V/0V , 0V/+5V with resulting additional 2.5V VCOM) are better than leaving one side connected to GND.
* Need for far-side low-impedance termination of the differential signal pair is unclear. R-C series termination could be an option:
* no L-C supply decoupling, datasheet recommends R-C supply filtering.
* Consider switching to 1EDN8550B or 1EDN6550B for higher UVLO threshold to prevent FET destruction. In case of a power failure, FETs will be saved and turn-off of a subset of FETs will result in no damage or blown fuses.