# copy circuit plan
1. copy circuit value column still use byte value while RW table takes word rlc type, for dynamic length memory copy, there are two cases.
- copy address start and end in one word. i.e.
copy_addr_start = 10 , copy_size = 15
copy_addr_end = copy_addr_start + copy_size = 10 + 15 = 25, which fits in slot0 word.
perfect case is start address is slot beginning and end address is slot end exactly. that is:

copy_addr_start=slot_start=0 (slot0)
copy_addr_end= slot_end=31 (slot1)
- copy address start and end are across two words.
i.e.
`copy_addr_start = 10, copy_size = 30,
copy_addr_end = 40`
`shit = copy_addr_start % 32 = 10`
`slot = copy_addr_start - 10 = 0`

two words are required here: `addr_left_word(slot0_word), addr_right_word(slot1_word).`

2. assume RW table use word rlc as value, layout as blew:

| rw_counter | is_write | address | value | ..|
|-------| --|---------|---------| ---|
| 1 | 0 | 0 | slot0_word| .. |
| 2 | 0 | 32 | slot1_word |..|
| 3 | 0 | .. | .. |.. |

Note: `address` represents `slot` above.

the copy circuit table remains byte type as value to minimal circuit changes, do word rlc for bytes in one slot, and compare word rlc value equals RW table memory row's word, in order to do rlc word for 32 bytes, need to append auxiliary bytes which is not copied acutally in evm execution. take following example to illustrate the stragety:
`copy_addr_start = 10, copy_size = 30,
copy_addr_end = 40`
`shit = copy_addr_start % 32 = 10`
`slot0 = copy_addr_start - 10 = 0`
`slot1 = slot0 + 32 = 32`

| q_step | type | address | Value | word_index | memory_word_rlc | slot_addr|
|------| -----|----|----|----| ---| --|
| 0 |Memory| 0 | byte0| 0 |rlc0 | 0 |
| 0 |Memory| 0 | byte1| 1 |rlc1 | 0 |
| 0 |Memory| 0 | byte2| 2 |rlc2 | 0 |
| 0 |Memory| ..| ...| .. | ..
| 0 |Memory| 0 | byte10 |10|rlc10 | 0 |
| 0 |Memory| ..| ...| .. | ..
| 0 |Memory| 1 | byte31 |31|rlc0_31| 0
| 0 |Memory| 1| byte32 |0|rlc0 | 1
| 0 |Memory| 1| byte33 |1|rlc1 | 1
| 0 |Memory| ..| ...| .. | ..
| 0 |Memory| 1| byte63 |31|rlc1_31 | 1

in order to compose all 32 bytes into rlc word, append beginning ten bytes [0-9,10] for slot0 and ending 22 bytes [41-63] for slot1.

assert rlc0_31 == addr_left_word(slot0_word) && word_index == 31
assert rlc1_31 == addr_right_word(slot1_word)&& word_index == 31

addtions:
- add `mask` column for actual copy bytes.
- add `slot_addr` column for memory word rw lookup requires.
- add 'word_index' column, value is within [0..32], when `word_index` column == 31 indicates stop calculating rlc. initial value set to 0.

miscs:
- for calldatacopy, in root call conditions, copy calldata bytes to memory, in order to pad 32 bytes, also need to pad calldata. for example:
calldata offset = 10 length = 15, original copy byte number = 15, src_addr = 10, src_addr_end = 25. copy to memory offset = 10,
after align memory slot, also need to align calldata lenght virtually divible by 32, calldata’s length pad from 15 to 32 as following:
calldata_slot[0..10] = memory_ bytes[0..10]， calldata_slot[10..25] = real_calldata_bytes[10, 15], calldata_slot[25..32] = memory_ bytes[25..32]
Similarly， other copy codes(codecopy etc.) requires pad src bytecodes.

3.if RW table was designed to hold value_word_rlc and value_pre_word_rlc in one row (), need come out one way to calculate value_pre_word_rlc for lookup