---
# System prepended metadata

title: Digital Design Lab 3
tags: [IUG, Digital Design, Computer Engineering, Digital]

---

---
description: In this lab, we are going to talk about how to convert your ideas to the actual design, we will start by analysing the idea, extracting inputs, finally, we will talk about how to optimize your design in different ways.
---
<h1 style='border: none'><center>Digital Design Lab 3</center></h1>
<h2 style='border: none'><center>Logic simplification using Universal Gates</center></h2>
<h5><center>The Islamic University of Gaza<br>Engineering Faculty<br>Department of Computer Engineering</center></h5>
<h6>Authors: Usama R. Al Zayan and Enaam Rajab<span style="float:right">2022/09/30</span></h6>
<h6>
    Parts of this Lab were adapted from work done by Mohammed Nafiz ALMadhoun and Mai Z. Alyazji.</h6>

---
## Objective

* To study the realization of basic gates using universal gates.
* Understanding how to construct any combinational logic function using NAND or NOR gates only.

## Logic Gates(NAND/NOR)
This subsection should be considered just as a quick revision of what you already take in the lecture, and for more information refer to your assigned textbook.

* `NAND` : is a NOT-AND gate which is equal to an AND gate followed by a NOT gate.  The outputs of all NAND gates are high if any of the inputs are low. The symbol is an AND gate with a small circle on the output. The small circle represents inversion.

<center>
    
![](https://i.imgur.com/9I8HDgF.png =200x)
    
</center>
    


*  `NOR` : This is a NOT-OR gate which is equal to an OR gate followed by a NOT gate.  The outputs of all NOR gates are low if any of the inputs are high. The symbol is an OR gate with a small circle on the output. The small circle represents inversion.

<center>
    
![](https://i.imgur.com/MovYMGd.png =200x)
    
</center>

 
## Universal Gates

`AND`, `NOT` and `OR` gates are the basic gates, we can create any logic gate or any Boolean expression by combining them. Now `NOR` and `NAND` gates which are the universal gates, have the particular property that any one of them can create any logical Boolean expression if designed in a proper way. On the other hands we can create any other gate using one of them. So, for your small lab at home try to buy a lot of `NAND` or `NOR` gates, 

please return to section 3.6 in your textbook to understand more. 

### NAND gate as Universal Gate

Here is a revision on how to create different gates using NAND:
1. Inverter

<center>

![Inverter Using NAND](https://i.imgur.com/WaKOUUq.png)
$O=\overline{A.A} = \overline{A}$
</center>

2. AND Gate

<center>

![AND Using NAND](https://i.imgur.com/Arj7kEy.png)
$O=\overline{\overline{A.B}} = A.B$
</center>

3. OR Gate

<center>

![OR Using NAND](https://i.imgur.com/zfZTVpc.png)
$O=\overline{\bar{A}.\bar{B}} = A + B$
*Using De Morgan's laws*
</center>

4. XOR Gate

<center>

![XOR Using NAND](https://i.imgur.com/1jylO4T.png)
$O=\overline{(\overline{A.\overline{A.B}}).(\overline{B.\overline{A.B}})} = A.\overline{A.B} + B.\overline{A.B} = \overline{A.B}.(A+B) = A \oplus B$
*Don't worry about it* 🤯
</center>

<div style="page-break-after: always;"></div>

### NOR gate as Universal Gate

Here is a revision on how to create different gates using NOR:
1. Inverter

<center>

![Inverter Using NOR](https://i.imgur.com/6bl5fLs.png =250x)
$O=\overline{A+A} = \overline{A}$
</center>

2. AND Gate


<center>

![AND Using NOR](https://i.imgur.com/TKnnG7e.png =300x)
$O=\overline{\bar{A}+\bar{B}} = A . B$
</center>

3. OR Gate

<center>

![OR Using NOR](https://i.imgur.com/lx3zX9t.png =300x)
$O=\overline{\overline{A+B}} = A+B$

</center>

4. XOR Gate


<center>

![XOR Using NOR](https://i.imgur.com/J8GwJdX.png =500x)
$O= \overline{A}.B + A. \overline{B} = A \oplus B$

</center>

<div style="page-break-after: always;"></div>

## Lab Tasks

### Task 1: Implemention Uing NAND Gate

Using Logisim-Evolution, Implement `NOT` gate and `OR` gate using only `NAND` gates. using ICs (TTL tab in Logisim).

### Task 2: Implemention Uing NOR Gate

Using Logisim-Evolution, Implement `AND` gate and `XOR` gate using only `NOR` gates. using ICs (TTL tab in Logisim).

### Task 3: Real OR Gate uing NAND Gate

After simulation, Try to build `OR` Gate using only `NAND` IC, which is 74/00.

## DataSheets

Please find the datasheet here:

**$74/00$** [DM74LS08 Quad 2-Input NAND Gates](https://cdn.datasheetspdf.com/pdf-down/7/4/L/74LS00_FairchildSemiconductor.pdf).

**$74/02$** [DM74LS02 Quad 2-Input NOR Gates](https://cdn.datasheetspdf.com/pdf-down/7/4/L/74LS02_FairchildSemiconductor.pdf).

<span style="color:#e20000" >**DON'T POWER UP THE KL-31001 WITHOUT MY PERMSIONS.**</span>
###### tags: `Digital Design` `Digital` `IUG` `Computer Engineering`
<center>End Of Lab 3</center>