--- description: In this lab, we are going to design some common combinational devices, we will start by designing a binary magnitude comparator. --- <h1 style='border: none'><center>Digital Design Lab 6</center></h1> <h2 style='border: none'><center>Combinational Designs I</center></h2> <h5><center>The Islamic University of Gaza<br>Engineering Faculty<br>Department of Computer Engineering</center></h5> <h6>Authors: Usama R. Al Zayan and Enaam Rajab<span style="float:right">2022/10/28</span></h6> <h6>Parts of this Lab were adapted from work done by Mohammed Nafiz ALMadhoun and Mai Z. Alyazji.</h6> --- ## Introduction In this lab, we are going to design some common combinational devices, we will start by designing a binary magnitude comparator. ## Magnitude Comparator We will start our magnitude comparator by comparing only two bits, our system will have two inputs (`A` and `B`), and we will have three outputs (`A=B`, `A>B` and `A<B`). <style> .markdown-body table { margin: 0 auto 18px; width: fit-content; } </style> | A | B | A = B | A > B | A < B | |:---:|:---:|:-----:|:-----:|:-----:| | 0 | 0 | | | | | 0 | 1 | | | | | 1 | 0 | | | | | 1 | 1 | | | | The problem with this device is that we couldn't extend it to compare multi-bits numbers, so we need to create a similar device but it should take the output of the previous bit comparator, so it can cascade the results. <center> ![One Bit Comparator with Cascading](https://i.imgur.com/0OaGfzN.png =650x) One Bit Comparator with Cascading </center> And this is the internals of it: <center> ![One Bit Comparator](https://i.imgur.com/wzOHSLt.png =450x) One Bit Comparator </center> Note that this device is useless and slow, usually, you will find the same idea of cascading but with a bigger number of bits (e.g 8-bit comparator with cascading). ## KL-33002 module * **Block c** of module **$KL-33002$**: 1-bit Comparator constructed with basic logic gates. Connect inputs A and B to data switches SW1 and SW2, connect outputs F1, F2, F5 to LEDs L1, L2, L3 respectively. * **Block d** of module **$KL-33002$**: will be used in task 1. U6 is a `74LS85` 4-bit comparator IC, Connect inputs A>B to SWI , A=B to SW2 , A<B to SW3 . Connect inputs A1~A4 and B1~B4 of the 7485 to DIP Switches DIP1.0~DIP1.3 and DIP2.0~DIP 2.3 respectively. See the datasheet for more details. ![KL-33002 module](https://i.imgur.com/xJsJ5LH.png) ## Lab Tasks ### Task 1: BCD Compartor Using `74LS85` IC (4-bit comparator) or Block d of module `KL-33002`, you will need to design a circuit that detects if a number is above 9, you will need 4 bits as inputs from the switches, and the other 4 bits from the comparator should be constant (9). ## DataSheets Please find the datasheets here: **$74/08$** [DM74LS08 Quad 2-Input AND Gates](https://cdn.datasheetspdf.com/pdf-down/7/4/L/74LS08_FairchildSemiconductor.pdf). **$74/85$** [DM74LS85 4-Bit Magnitude Comparator](https://cdn.datasheetspdf.com/pdf-down/7/4/L/74LS85_FairchildSemiconductor.pdf). **$74/138$** [DM74LS138 3-to-8-line decoders](https://cdn.datasheetspdf.com/pdf-down/7/4/L/74LS138_FairchildSemiconductor.pdf). <span style="color:#e20000" >**DON'T POWER UP THE KL-31001 WITHOUT MY PERMSIONS.**</span> <center style="font-size: 28px">Good luck in your midterm exams ❤</center> ###### tags: `Digital Design` `Digital` `IUG` `Computer Engineering` <center>End Of Lab 5</center>