% OpenVAF and Verilogae
% Open-Source VerilogA Compiler tools for Parameter extraction
% Pascal Kuthe
# Outline
* Motivation
*
* Current State (Live Demo)
* Plans for NGSPICE Integration
# Motivation
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- Parameter extraction without circuit simulation (DMT)
- Use multiple individual measurments
- Based on literature
- Without circuit simulation
-> Requires the modelequations
- Previously: Handimplementations of HICUM/L2
- Error prone
- Lots of maitaince
- Lots of work for a new model
- Not very fast
-> Classic problem for a compiler
## Requirements
* Support all compact models of the CMC
* Fast compilation and execution
* Compile functions that only calculate the value of a singular variable
* List all parameters, voltages and currents that influence a variable
* Dependency breaking
## Examening existing "compilers"
* ADMS
* effictifly a transpiler
* abondoned
* Can't produce subfunctions for individual variables
* VAPP
* Not a compiler (donesn't produce executable code)
* Bound to matlab
* Can't produce subfunction for individual variable
-> A suitable opensource VerilogA compiler doesn't exist
## Introducing Verilogae
* Built on top of OpenVAF:
* Fully feature modular compiler for VerilogA
* Targets LLVM the backend used by: Clang, Swift, Rust
* Abstract represntation of the source code
* Automatic symbolic derivatives of arbitrary order
* State of the art optimization algorithems
* Uses optimizations algorithems to generate functions for variables
* Generates a python interface that can be easily called f
# Simple demonstration
Calculate current and capacitance from measued voltage and temperature
# Current State

# Current State

# HICUM/L2 rigorus
# Development
* Fully integrated into DMT
* Mostly feature complete
* Well tested using HICUM/L2 and HICUM/L0
* All BSIM and VBIC models compile
* Bug reports appriciated
* Outlook: Work towards compiling compact models for NGSPICE using OpenVAF