---
# System prepended metadata

title: Regulart Meeting (2020.5.17)
tags: [Regular Meeting, DeWei]

---

# Regulart Meeting (2020.5.17)

* Generate Device with Xilinx Vitis, does not need to write DT manual anymore

## Generate Device with Xilinx Vitis, does not need to write DT manual anymore

Just apply this script with *Vitis*+*HSI*

```tclsh
hsi::set_repo_path ${kXilDTRepoPath}
hsi::open_hw_design ${kXSAFilePath}
hsi::create_sw_design device-tree -os device_tree -proc ps7_cortexa9_0
hsi::generate_target -dir ${kOutputDir}
```

* `${kXilDTRepoPath}` [download from here, I've include it into my source code](https://github.com/Xilinx/device-tree-xlnx.git"), 
* `${kXSAFilePath}` is generated by *vivado* (HDL code to xsa file)
* Result ![](https://i.imgur.com/x5pBHOt.png)
* Next step: Using: [compile dt(text file) to dtb(bin file)](https://archlinux.org/packages/community/x86_64/dtc/)


###### tags: `Regular Meeting` `DeWei`