* Zybo * CDCFE ## Zybo * Checking Boot Image format * Maybe address loading issue * [uboot command](http://pominglee.blogspot.com/2013/12/uboot.html) ## CDCFE ### Last week * Trigger level should be written by SPI port * Maybe tested input should be pulse * Since input has pulse shaper * ![](https://i.imgur.com/I2en4na.png) * -> **Check FPGA code ### This week * Reading code * Still can't synthesis * **SPI <-> Pi <<--- how to ctrl**