# Regular Meeting (2020.9.28)

1. Regarding how to configure BSDL file with Altera FPGA
2. Testing of loopback with 2m filber between 2 optical modules
3. Organizing all of test result for UT4
4. UT3 has no "insertion loss at Nyquist(dB)" of setting
5. Benefit of "programming with Ehternet programmer"

## 1. Regarding how to configure BSDL file with Altera FPGA

I can't find solution for programming with BSDL file

## 2. Organizing all of test result for UT4

* [link here](https://hackmd.io/@BelleII-CDC-Trig-NTU-DeWei/B12VMTjSv)

## 2.1 A test has a problem

* Loop-back on Single optical module
* Sent date does not correspond to times $\cdot$ data-rate

### 2.2 Which results did I miss?

* 3dB customized fiber
* 3dB 1 m (>1day)

## 4. UT3 has no "insertion loss at Nyquist(dB)" of setting

UT4 has

UT3 has not


## 5. Benefit of "programming with Ehternet programmer"

* We convert this problem to:
* What's benefit of *"Ehternet Printer"*?

###### tags: `Regular Meeting` `DeWei`