# Regular Meeting (2022.7.11) * Zybo-z7 * CDCFE Fanout Baord ## 1 Zybo-Z7 [Trying here](https://qiita.com/yhmtmt/items/cba5330ad7ded151882d) * Modify DT and rebuild * RAM-DISK * Boot ROOTDIR is RAMDISK * After boot, `rm` folders boot time * Very difference to x86 system ## 2 CDCFE Fanout Baord ## 2.1 Schedule: 1. Booking BOM (~2 weeks DT) * Layout completed within 2 weeks 2. Print 1:1 board, put booked compoent on board (Jenny's suggestion) 2.5 Maybe verify each IC with SMD-DIP board 3. Delivered for manufacturing (~1 weeks) 4. Soldering My Layout SW(KiCad) provide PCB calculator ![](https://i.imgur.com/hmmkvT0.png) ### 2.2 BOM #### 2.2.1 ICs * OPA 0. Requrement * 50 ohm(Fanout Board Ro) + 50 ohm(terminated Ri) line impedance, which output current 1/ch: * For 10Vpp/dc=0 and * 5V/(50 ohm + 50ohm) = 50mA (1/ch) * 4 channels: 50mA\*4 = 200 mA * 8 channels: 50mA\*8 = 400 mA * OPA2674/OPA3694 can't achieve +5V/-5V when supply +-5V * OPA2674: +-4.8V when supply +- 6V (worst case) * OPA3674: +-3.3 when supply +- 5V (worst case) * Date refer to datasheet * So about +-3V, which is we guarentee swim for worst case (datasheet) * For 1Vpp/dc=0 and * 0.5V/(50 ohm + 50ohm) = 5mA (1/ch) * 4 channels: 5mA\*4 = 20 mA * 8 channels: 5mA\*8 = 40 mA 1. [OPA3692ID](https://www.ti.com/lit/ds/symlink/opa3692.pdf) * Fixed resistor/gain video(analog) buffer * Output current: 190mA/ch max * ~ 300 NTD/pcs 2. [OPA2674ID](https://www.ti.com/lit/ds/symlink/opa2674.pdf) * High current out OPA (500mA/ch) * ~200 NTD/pcs 3. [OPA735](https://www.ti.com/lit/ds/symlink/opa735.pdf) * For reference voltage: divide to 0.6V from 2.5V * Reference voltage: [REF4321](https://www.ti.com/lit/ds/symlink/ref4132-q1.pdf), We have 10 pcs on lab521 presently. * ![](https://i.imgur.com/XicKRhO.png) * [Difference between reference voltage and voltage regulator](https://electronics.stackexchange.com/questions/221312/voltage-regulator-vs-voltage-reference) * ~150 NTD/pcs * Also refer to here * [How the voltage reference affects ADC performance, Part 1](https://www.ti.com/lit/an/slyt331/slyt331.pdf) * [How the voltage reference affects ADC performance, Part 2](https://www.ti.com/lit/an/slyt339/slyt339.pdf) * [How the voltage reference affects ADC performance, Part 3](https://www.ti.com/lit/an/slyt355/slyt355.pdf) * Reference Voltage!!!???? * Previous test, he used * ![](https://i.imgur.com/mlMZy1c.png) * But [newest test](https://drive.google.com/file/d/1YFkMaBQrdKCMgRm2wFkOjw4l-dCjey0_/view), he did not use * ![](https://i.imgur.com/mSzSPLT.png) * LDO 0. Since I tried ~10-ohm@-5V load with [7905](https://www.ti.com/lit/gpn/lm79), input should rise to 12V * Power loss: $(12V-5V)\cdot500mA=3.5W$ ----> **Very hot** * I guess that *Power wires* generated 1 ohn resistor (I used 2), maybe *breadboard* also has problem, maybe... think wires... * 7950 does not provied *Load(current) vs drop* chart 1. [LT3015](https://www.mouser.tw/datasheet/2/609/3015fb-1271510.pdf): -5V LDO * ~ 300 NTD/1pcs * 1.5A, 300mV drop volage * ![](https://i.imgur.com/Lt5q0dP.png) 2. [MCP1727-5002E/SN](https://ww1.microchip.com/downloads/en/DeviceDoc/21999b.pdf): +5V LDO * ~ 40 NTD/1pcs * 1.5A, 300mV drop volage * ![](https://i.imgur.com/abEpwf5.png) #### 2.1.2 etc * Wires * [22awg dc cable (single wire)](https://shopee.tw/product/14138627/1326033617) * [Current/AWG recommended](https://www.jst.fr/doc/jst/pdf/current_rating.pdf) * [Ampacity(wiki)](https://en.wikipedia.org/wiki/Ampacity) >Current rating: For electronic components (such as transistors, voltage regulators, and the like), the term current rating is more-commonly used than ampacity, but the considerations are broadly similar. However the tolerance of short-term overcurrent is near zero for semiconductor devices, as their thermal capacities are extremely small. * U.FL connecotrs and wires * [U.FL socket](https://www.mouser.tw/ProductDetail/Molex/73412-0110?qs=NlNVDDZd7xQHV8e0ilpSdQ%3D%3D)\*30 or \*50 * U.FL to BNC(50cm or 1M) \*15 * Clk source * Signal source * 8 channels Fanout Board to Scope (optional) * U.FL to U.FL(15cm)\*10 * 8 channels Fanout Board to CDCFE-Prototype * Price reference: 葰茂 sma-u.fl, 15cm 100NTD * I wish this cables has double shielding and ~30 awg * [Switches](https://shopee.tw/product/8481484/21619903574) for lab521 redecorate of cables * Probe * R/F time: 450 ps (Scope's freebie) * We present SMA-BNC calbe, SMA/BNC connector * For present func-gen (20MHz, 8ns R/F time): no problem ###### tags: `Regular Meeting` `DeWei`