---
# System prepended metadata

title: Regular Meeting (2020.12.28)
tags: [Regular Meeting, DeWei]

---

# Regular Meeting (2020.12.28)


* Regarding Xilinx Virtual Cable (XVC)

0. My source code
    * https://github.com/curly-wei/xvc

1. Tried to use official example (change FPGA part)
    * ![](https://i.imgur.com/sNff9SM.png)
    * Thus, we need to re-generate XVC-block with its source code

2. Generate XVC-block with its source code
    * ![](https://i.imgur.com/ljJzxy7.png) 

3. I've feedback to official forum.

###### tags: `Regular Meeting` `DeWei`