# ASSEMBLY LANGUAGE AND MICROCOMPUTER Homework \#1
### 1. Translate the following C-codes into the assembly codes based on the simple MU0 instruction set. In addition, translate the assembly code into the binary code. The instruction STP should be placed at the end of your program to terminate the running of the program. You should describe your assumption and the initial contents of the program memory when your program starts running.
##### (a)
```cpp=
int a, b, c ;
if (a >= b)
c = a – b + 1;
else
c = b – a – 2;
```
**Answer:**
*pseudo code:*
```cpp=
label_name instruction description
Reset
LDA addr_a load a into ACC
SUB addr_b let ACC = a - b
JGE gre_equ if a - b >= 0, jump to label gre_equ
LDA addr_b load b into ACC
SUB addr_a minus a
SUB addr_const_2 minus 2
STO addr_c save ACC's value into c
STP
gre_equ: ADD addr_const_1 plus 1
STO addr_c save ACC's value into c
STP
```
*actual code:*
```cpp=
address code binary code data
0 Reset xxxx xxxx xxxx xxxx
2 LDA 24 0000 0000 0001 1000
4 SUB 26 0011 0000 0001 1010
6 JGE 18 0101 0000 0001 0010
8 LDA 26 0000 0000 0001 1010
10 SUB 24 0011 0000 0001 1000
12 SUB 32 0011 0000 0010 0000
14 STO 28 0001 0000 0001 1100
16 STP 0111 xxxx xxxx xxxx
18 ADD 30 0010 0000 0001 1110
20 STO 28 0001 0000 0001 1100
22 STP 0111 xxxx xxxx xxxx
24 a
26 b
28 c
30 1
32 2
```
##### (b)
```cpp=
int i, sum ;
sum=0;
for (i=1; i<100; i++) sum = sum + i;
```
**Answer:**
*pseudo code:*
```cpp=
label_name instruction description
Reset
LDA addr_const_0 load 0 into ACC
STO addr_sum let sum = 0
ADD addr_const_1 ACC + 1
STO addr_i let i = 1
loop LDA addr_i load i into ACC
SUB addr_const_100 let ACC = i - 100
JGE next if i >= 100, exit loop
LDA addr_i reload i
ADD addr_sum let ACC = sum + i
STO addr_sum save sum + i into sum
LDA addr_i reload i
ADD addr_const_1 let ACC = i + 1
STO addr_i save i + 1 into i
JGE loop do a new iteration
next STP
```
*actual code:*
```cpp=
address code binary code data
0 Reset xxxx xxxx xxxx xxxx
2 LDA 36 0000 0000 0010 0100
4 STO 34 0001 0000 0010 0010
6 ADD 38 0010 0000 0010 0110
8 STO 32 0001 0000 0010 0000
10 LDA 32 0000 0000 0010 0000
12 SUB 40 0011 0000 0010 1000
14 JGE 30 0101 0000 0001 1110
16 LDA 32 0000 0000 0010 0000
18 ADD 34 0010 0000 0010 0010
20 STO 34 0001 0000 0010 0010
22 LDA 32 0000 0000 0010 0000
24 ADD 38 0010 0000 0010 0110
26 STO 32 0001 0000 0010 0000
28 JGE 10 0101 0000 0000 1010
30 STP
32 i
34 sum
36 0
38 1
40 100
```
### 2. Find out the number of cycles it takes MU0 processor to run your codes for Prob1.
* Reset, JMP, JGE, JNE, STP are supposed to be 1 cycle, and others are 2 cycles.
**Answer:**
##### (a)
* if a >= b:
* 1 + 2 + 2 + 1 + 2 + 2 + 1 = 11
* if a < b:
* 1 + 2 + 2 + 1 + 2 + 2 + 2 + 2 + 1 = 15
##### (b)
* 1 + 2 + 2 + 2 + 2 + (2 + 2 + 1 + 2 + 2 + 2 + 2 + 2 + 2 + 1) * 99 + 2 + 2 + 1 + 1 = 1797
### 3. Discuss whether the current MU0 ISA can support the following C-code or not. If not, propose a new instruction for MU0 to solve the problem. Explain how your new instruction works.
```cpp=
int A[100], sum=0;
for (i=1; i<100; i++) sum = sum + A[i];
```
**Answer:**
* Current addressing mode and ISA of MU0 cannot support this C-code.
* Add instruction `ADD r1,r2`, represent **Base plus index addressing**, which `r1` and `r2` specify `base` and `index`.
* ADD r1, r2: ACC = ACC + mem[r1 + r2]
*assembly code:*
```cpp=
label_name instruction description
LDA addr_const_0
STO addr_sum initialize sum
LDA addr_const_1
STO addr_i initialize i
loop LDA addr_i
SUB addr_const_100
JGE next if i >= 100, jump to label next
LDA addr_sum ACC = sum
ADD addr_A, addr_i ACC = sum + A[i]
STO addr_sum
JMP loop
next STP
```
### 4. Verify the control output signals used in MU0 to execute JGE and STO instructions shown in Table 1.2 of textbook.
**Answer:**
### 5. Draw MU0 register transfer level organization.
**Answer:**
### 6. What addressing modes are supported by MU0?
**Answer:**
Only direct addressing can be implemented if you don't expand the ISA.
if you add the instructions of ISA, maybe you'll have:
* implied addressing
* immediate addressing
* direct addressing
* indirect addressing
* PC relative addressing
### 7. How to check whether ACC is greater or equal to 0?
**Answer:**
Use the instruction ***JGE***.
### 8. Write down five different types of addressing modes, and give some examples.
**Answer:**
* immediate addressing: ```ADD #6: ACC = ACC + 6```
* direct addressing: ```ADD 0x01f0: ACC = ACC + mem[0x01f0]```
* indirect addressing: ```ADD [0x01f0]: ACC = ACC + mem[mem[0x01f0]]```
* register addressing: ```ADD r1: ACC = ACC + r1```
* stack addressing: ```ADD: ACC = ACC + mem[SP]```
### 9. What is the capacity of address space of MU0 processor? How do you decide it?
**Answer:**
8k bytes. The reason is that the address space 12 bits. $2^{12}$ words = 4k words = 8k bytes.
### 10. In order to support subroutine calls, what instructions have to be added to the current ISA? In addition, show how to modify the MU0 organization to implement these newly added instructions.
**Answer:**
* Add instructions **before jumping to the subroutine and the main function**.
* modified memory
* **Add memory block to store <font color = "red">stack pointer</font>.**
* **Add stack to store return address of main function.**
* 
* new instruction
* SPC mem[SP]: Store current value of `PC` to the **memory stack block where `Stack Pointer(SP)` points to**.
* JMP mem[mem[SP]]: Jump to the instruction what `SP` points to (**indirect addressing mode jump**).
* How it work?
* call subroutine:
```cpp=
code description
SPC addr_SP store the current PC value to where SP points to
LDA addr_SP ACC = SP
ADD #1 ACC = SP + 1
STO addr_SP SP = SP + 1
JMP addr_sub jump to the subroutine code
subroutine...
```
* return to the main function:
```cpp=
code description
LDA addr_SP ACC = SP
SUB #1 ACC = SP - 1
STO addr_SP SP = SP - 1
JMP mem[mem[SP]] jump to the previous function(by indirect addressing mode)
previous_function...
```
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