# Lab 7
Name: Aarya
Roll No.: CS22B018
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## Question 1
0.1 × 2 = 0.2 (integer part: 0)
0.2 × 2 = 0.4 (integer part: 0)
0.4 × 2 = 0.8 (integer part: 0)
0.8 × 2 = 1.6 (integer part: 1)
0.6 × 2 = 1.2 (integer part: 1)
0.2 × 2 = 0.4 (integer part: 0)
This process repeats. As we can see, the fractional part oscillates between 0.1 and 0.2. So, 0.0001100110011... is the binary form of 0.1
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## Question 2
The sign bit is 0 for positive numbers.
Given number is a positive number, so the sign bit is 0.
(0.1)10 = (1.6 × 2 power −4)10
In binary,
1.6 is
1.6 × 2 = 3.2 (integer part: 1)
0.2 × 2 = 0.4 (integer part: 0)
0.4 × 2 = 0.8 (integer part: 0)
0.8 × 2 = 1.6 (integer part: 1)
0.6 x 2 = 1.2 (integer part: 1)
0.2 x 2 = 0.4 (integer part: 0)
0.4 x 2 = 0.8 (integer part: 0)
0.8 x 2 = 1.6 (integer part: 1)
0.6 x 2 = 1.2 (integer part: 1)
we can see that 1001 is repeating
1.6 in binary is 1.10011000110001.....
(0.1)10 = (1.1 × 2 power −4)2
Now, the exponent part is
2 power −4
4 + 127 = (131)10
(131)10 = (10000011)2
So, the IEEE 754 representation is:
Sign bit: 0 (positive)
Exponent: 10000011
Mantissa: 10011001100110011001100
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## Question 3
(0.2)10 = (1.6 × 2 power −3)10
In binary,
1.6 is
1.6 × 2 = 3.2 (integer part: 1)
0.2 × 2 = 0.4 (integer part: 0)
0.4 × 2 = 0.8 (integer part: 0)
0.8 × 2 = 1.6 (integer part: 1)
0.6 x 2 = 1.2 (integer part: 1)
0.2 x 2 = 0.4 (integer part: 0)
0.4 x 2 = 0.8 (integer part: 0)
0.8 x 2 = 1.6 (integer part: 1)
0.6 x 2 = 1.2 (integer part: 1)
we can see that 1001 is repeating
1.6 in binary is 1.10011000110001.....
(0.1)10 = (1.1 × 2 power −3)2
3 + 127 = (130)10=(10000010)2
So, the IEEE 754 representation is:
Sign bit: 0 (positive)
Exponent: 10000010
Mantissa: 10011001100110011001100
To convert it back to decimal, we reverse the process:
Sign bit: 0 (positive)
Exponent: 10000010 (130 - 127 = 3)
Mantissa: 1.10011001100110011 (with implied 1 bit)
coverting mantissa into decimal
1×2 power 0 + 1×2 power −1+ 0×2 power −2 + 0×2 power −3 + 1×2 power −4 +…
This forms an infinite geometric series with the first term
a=1 and the common ratio r= 1/2
.
Using the sum of an infinite geometric series formula s=a/1-r = 1/ 1/2 =2 in decimal
exponent is 3
so 2 x 2 power -3= 0.20
---
## Question 4
Representation:
For each number:
Register 1: Integral part.
Register 2: Fractional part.
Let's set the precision to 3 for this question. This means we'll have three digits after the decimal point. We'll scale all the fractional part numbers to the respective number of digits we choose for precision. For example, if precision is 3 and the fractional part is 1, then we scale it to 1000.
Let's add 3.721 and 6.364.
Convert to BCD:
For 3.721:
Register 1: 3
Register 2: 721
For 6.364:
Register 1: 6
Register 2: 364
Add the fractional parts:
721 + 364 = 1085
Since 1085 > (10^precision) [here precision=3], i.e., 1085 > 1000, we get a carry = 1;
Fractional part = 1085 - 1000 = 85
Integer part:
Integer part of the first number + integer part of the second number + carry
3 + 6 + 1 = 10
For the result of the addition of the above two numbers, we get:
Result:
Register 1: 10
Register 2: 085
---
## Question 5
**Code**
```assembly=
.data
f1: .word 0x03000000 # First input number in IEEE 745 format
f2: .word 0x02000000 # Second input number in IEEE 745 format
ans: .word 0x0 # Memory location to store the answer
p: .word 0x800000 # Exponent bias
m: .word 0x7fffff # Mantissa mask
e: .word 0x7f800000 # Exponent mask
s: .word 0x80000000 # Sign mask
.text
# Main function
Main:
# Load constants
lw a1 m
lw a2 e
lw a3 s
lw a4 p
# Load input numbers
lw s0 f1
lw s1 f2
# Extracting components (mantissa, exponent, and sign bit)
and t0 s0 a1
or t0 t0 a4
and t1 s0 a2
srli t1 t1 23
and t2 s0 a3
srli t2 t2 31
and t3 s1 a1
or t3 t3 a4
and t4 s1 a2
srli t4 t4 23
and t5 s1 a3
srli t5 t5 31
# Check which number has the greater exponent
bge t1 t4 CheckExp
# Swap mantissas and proceed with the smaller exponent
SwapMantissas:
mv a5 t0
mv a6 t1
mv a7 t2
mv t0 t3
mv t1 t4
mv t2 t5
mv t3 a5
mv t4 a6
mv t5 a7
# CheckExponent and Adjust
CheckExp:
# Subtract exponents
sub s2 t1 t4
sra t3 t3 s2
# Check sign bit
beq t2 x0 CheckSign1
sub t0 x0 t0
# CheckSign1
CheckSign1:
beq t5 x0 CheckSign2
sub t3 x0 t3
# CheckSign2
CheckSign2:
# Add mantissas
add s3 t0 t3
# Adjusting to IEEE 754 format
AdjustIEEE:
bge s3 a4 CheckNeg
# Adjusting the exponent
slli s3 s3 1
addi t1 t1 -1
j AdjustIEEE
CheckNeg:
# Check if result is negative or positive
addi t6 x0 0
bge s3 x0 CheckCarry
sub s3 x0 s3
addi t6 x0 1
CheckCarry:
# Check for carry
srli s4 s3 24
beq s4 x0 End
# CarryAdjust
CarryAdjust:
srli s3 s3 1
addi t1 t1 1
j CheckCarry
End:
li a5 0
slli t6 t6 31
add a5 a5 t1
slli a5 a5 23
and s3 s3 a1
add a5 a5 s3
or a5 a5 t6
# Store result
la x28 ans
sw a5 0(x28)
# Print the result in IEEE 754 format
li a7 34
add a0 x0 a5
ecall