# Operating System Concepts, Ch. 1: Introduction
## Computer System Organization
- GP (general-purpose) Computers have device controllers connected through a common **bus** that provides access between components and shared memory.
- OS have a device driver for each device controller.
- CPU and device controllers may compete for memory access. Memory controllers synchronize memory access.

### Interrupts
- Hardware may trigger an interrupt at any time by sending a signal to the CPU, usually by way of the system bus (main communication path).
- Interrupts are how OS and hardwares interact.
- When interrupted, a CPU stops what it is doing, and transfers execution of the service routine address.
- The **interrupt vector** stores pointers of ISRs for many devices. An interrupt uses one of its stored addresses.
- Interrupts should save state information and/or register values prior to them.
- CPUs have **"Interrupt Request Line"** wires for them to sense after every instruction.
- When interrupts are done, states and originally running tasks are restored.

### Modern Interrupts
**Requirements:**
- Deferring interrupts during critical processing
- Efficient interrupt handler dispatching
- Multilevel (priority) interrupts

**Solutions**:
- Modern CPUs have 2 interrupt lines: **non-maskable** (for critical ones like unrecoverable memory errors), and **maskable** (for device controllers).
- Interrupt vectors (lists of handlers) may be insufficient for number of devices. May use interrupt chaining instead (lists of chains of handlers).
- Can also serve as priority systems (high priority ones preempting low ones).

### Storage
- Top 4 layers are semi-conductor technology.
- NVMs are commonly **flash memory**.

### I/O
- Interrupt-driven I/O may be too slow for secondary storage (one interrupt per byte transferred)
- Use **Direct Memory Access (DMA)** instead. Devices can directly access momery segments after some set-ups (buffers, pointers, counters, ...)
- Greatly reduces #interrupts and asynchronousity

## Computer System Architecture
- Devices may have a microprocessor with limited instruction sets, relieving CPUs of device-specific tasks (disk scheduling, keyboard codec, ...)
- Multiple (central) processors share a bus, and sometimes the clock, memory, and peripheral devices.
- How CPUs connect: **NUMA (non-uniform memory access)**. Scales better when adding more CPUs, although there may be penalties for CPU0 to access memory3.
- **Blade Servers**: multiple independent multiprocessor systems.
- **Graceful Degradation**: In clustering systems, as the number of surviving systems drops, the service too does so proportionally.

## Operating System Operations
- **Bootstrap Program**: The first program a computer runs when booted. (initializing CPU registers, device controllers, memory contents, **loading kernel**, ...)
- **Traps** or **Exceptions**: Software generated exceptions. Either an **error**, or a **system call request** (a process requesting actions of the OS on its behalf. System calls trap the system to a specific location in the **interrupt vector**).
- **Multiprogramming**: Running multiple processes. Switches when stalled.
- **Multitasking**: Switches fast with **CPU Scheduling**. Lower **response time**.
- The **Kernel Mode** and **User Mode** are distinguished by a bit indicator in computer hardware.
- **Privileged Instructions**: Only executable in kernel mode. (kernel mode switching, IO control, timer management, interrupt management, ...)
- **Virtualization** may require intermediate modes.
- When illegal actions occur, the hardware traps to the OS.
- **Timers** are used to prevent any program from occupying the CPU for too long. When it expires, control transfers automatically. Timer modification is privileged.

## Resource Management
- Each thread in a process has one program counter.
- The OS is in charge of the creation & deletion, scheduling, suspension, resuming, synchronization and communication of processes/threads (user/system).
- **Cache Management** is important, especially in multitasking (processes accessing the same cached value) and multiprocessor systems (local caches, **cache coherency**).

## Kernel Data Structures
- Linux uses RB-Trees as its CPU-scheduling algorithm.