---
# System prepended metadata

title: LAB-9

---

# LAB-9
#### Name: Aseem Anand
#### Roll No.: CS22B008
## Question-1
module ALU(
    input [3:0] A,        // 4-bit input A
    input [3:0] B,        // 4-bit input B
    input [1:0] select,   // 2-bit control signal for operation selection
    output reg [3:0] result // 4-bit result based on the operation
);

// Temporary wires to hold operation results
wire [3:0] sum, sub, and_op, or_op;

// Perform all operations
assign sum = A + B;        // Addition
assign sub = A - B;        // Subtraction
assign and_op = A & B;     // Logical AND
assign or_op = A | B;      // Logical OR

// MUX to select the operation based on the control signal
always @ (select or sum or sub or and_op or or_op)
begin
    case(select)
        2'b00: result = sum;      // When select is 00, perform Addition
        2'b01: result = sub;      // When select is 01, perform Subtraction
        2'b10: result = and_op;   // When select is 10, perform Logical AND
        2'b11: result = or_op;    // When select is 11, perform Logical OR
        default: result = 4'bxxxx; // Undefined operation
    endcase
end

endmodule
## Question-2
module SimpleProcessor(
    input wire [7:0] instruction, // 8-bit instruction as per the design
    input wire [7:0] data_in,     // Data input for load operations
    output reg [7:0] data_out,    // Data output for store operations
    output reg [7:0] address      // Address for memory operations
);
    // Define registers for R1 and R2
    reg [7:0] R1, R2;

    // Decode the instruction
    wire op = instruction[7];      // Operation: 0 for lw, 1 for sw
    wire [1:0] reg_sel = instruction[6:5]; // Register select: 10 for R2
    wire [2:0] offset = instruction[4:2];  // Offset for addressing
    wire [1:0] base_sel = instruction[1:0]; // Base register select: 01 for R1

    always @(*) begin
        case (base_sel)
            2'b01: address = R1 + offset; // Calculate address using R1 as base
            // Additional base registers can be added here
            default: address = 8'bxxxx_xxxx; // Undefined base register
        endcase

        if (op == 0) begin // Load operation (lw)
            if (reg_sel == 2'b10) begin // Load into R2
                R2 = data_in; // Load data into R2
            end
            // Additional registers can be handled here
        end else if (op == 1) begin // Store operation (sw)
            if (reg_sel == 2'b10) begin // Store R2's content
                data_out = R2; // Output data from R2
            end
            // Additional registers can be handled here
        end
    end

    // Initialize R1 for demonstration purposes
    initial begin
        R1 = 8'b0000_0000; // Base address initialization
        R2 = 8'b0000_0000; // Initialize R2
    end

endmodule
## Question-3

### C Program: factorial.c

#include <stdio.h>

// Function to calculate factorial of a number
int factorial(int n) {
    if (n == 0)
        return 1;
    else
        return n * factorial(n - 1);
}

int main() {
    int number = 5;
    printf("Factorial of %d is %d\n", number, factorial(number));
    return 0;
}

### no. of instructions 
Count 325
