# Chp 9: Main Memory

###### tags: `作業系統`

## P.4

## P.5

## P.6 Hardware Address Protection


## P.7,8 Address Binding


## P.10

* **logical address**(a.k.a virtual address): generated by CPU
* **physical address**: address seen by memory unit

## P.11,12 Memory-Management Unit (MMU)

* Maps **virtual to physical** address at run time.
* User program deals with **logical addresses**, never sees physical address.


## P.13 Dynamic Linking

### Static $v.s.$ Dynamic

* **Static**
system libraries and program code combined by the loader into the binary program image
* **Dynamic**
linking postponed until execution time

## P.14~16 Swapping


## P.17,18 Context Switch & Swapping

## P.19 Swapping on Mobile Systems

## P.20,21 Contiguous Allocation

* Main memory usually "split" into 2 partitions
* low memory
Resident operating system
* high memory
User processes
* MMU maps logical address *dynamically*.
## P.22 Hardware Support for Relocation and Limit Registers

## P.23 Multiple-partition allocation

* Degree of multiprogramming limited by number of partitions


## P.24 Dynamic Storage-Allocation Problem

* **First-fit**
- Allocate the **first** hole that is big enough
- faster speed
* **Best-fit**:
- Allocate the **smallest** hole that is big enough; must search entire list, unless ordered by size
- better storage utilization
* **Worst-fit**
- Allocate the **largest** hole; must also search entire list
- worse

## P.25,26 Fragmentation

### Type
* External Fragmentation
- enough total memory space
- not contiguous
* Internal Fragmentation
unused memory internal to a partition is required

### Compaction
* Shuffle memory contents to place all free memory together in one large block
* Dynamic allocation required
* Done at execution time

### Solution to External Fragmentation

* **Compaction**
- Shuffle memory contents to place all free memory together in one large block
- Requirement: only if relocation is **dynamic**, and is done at **execution time**

## P.27~32 Segmentation

* **Segment table** – maps two-dimensional physical addresses


* limit: length of the segment
* Segment-table base register (STBR) points to the segment table’s location in memory
* Segment-table length register (STLR) indicates number of segments used by a program

## P.33~43 Paging

* **frames**: Divide **physical** memory into fixed-sized blocks
* **pages**: Divide **logical** memory into blocks of same size

### Address Translation Scheme

Page number (p ) – used as an index into a page table

Page offset (d) – combined with base address to define the physical memory address

| page number |page offset |
| :--------: | :--------: |
|m-n bits |n bits |
|p|d|
### e.g.



### Implementation

* Page-table base register (PTBR) points to the page table
* Page-table length register (PTLR) indicates size of the page

* **associative memory / translation look-aside buffers (TLBs)**
fast-lookup hardware cache
* 由於page table是存放在physical memory裡的，所以要真正存取memory裡的資料實際上是要access memory 2次的，為了加速這個過程而使用TLB當cache來儲存一部分的page table
* With TLB:

## P.44 Effective Access Time

## P.45~46 Memory Protection

* indicates whether the associated page is in the process’ logical address space
by **Valid-invalid bit** or **page-table length register (PTLR)**

## P.49~P.55 Hierarchical Page Tables

* 由於不想讓page table佔用太多記憶體連續空間，因此使用two-level的方式存取
* 

* 32 bit

* 64 bit

## P.56 Hashed Page Tables


## P.58 Inverted Page Table

>[Memory簡介](https://mropengate.blogspot.com/2015/01/operating-system-ch8-memory-management.html)
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