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# System prepended metadata

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1. Are the results in Table 3 from actual hardware runs on a physical network of FPGA devices?

We have a physical network of three U250 FPGA boards for experiments. In our experiments, we partitioned the systems into groups of three FPGA boards, and collected performance results from the network for each group. Notably, we discovered that the latency in our point-to-point cross-board communications is consistent, enabling us to deduce system performance from the gathered data, as presented in Table 3. We will clarify this in the camera-ready version.

2. How many FPGA devices are used in evaluation listed in Table 3?

The numbers of FPGA devices for each model are reported in the "#device" column - we will clarify that in the caption of Table 3. We normalized the device count by energy as our assessment concentrates on results expressed in tokens per second per watt (TPS/W). 


3. What is meant by "traditional quantization" in Figure 6? is it layer-wise, channel-wise, mixed precision, or MSFP (the same as MASE) but just searched in a different way?

Both employ layer-wise mixed-precision quantization in the MSFP format. Nevertheless, traditional quantization solely pursues a solution that reduces memory footprint while enhancing accuracy. In contrast, MASE’s hardware-awareness (because of the detailed hardware performance modeling) enables it to extend the search to incorporate direct hardware metrics, such as throughput and area. We will further clarify this distinction in the caption of the figure.